The formation of CMOS transistors requires the integration of several steps including deposition, annealing, cleaning, and patterning. This paper investigates the nature of the interface between amorphous silicon (a-Si) and silicon nitride (Si3N4), and its impact on the gate breakdown voltage. It has been found that a continuous native oxide between a-Si and Si3N4 is critical in preventing the agglomeration of silicon during high temperature annealing.

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