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This paper presents a 15 W wireless power receiver, which integrates an improved full-wave synchronous rectifier. In order to improve the system efficiency, two auxiliary MOSFETs are proposed to balance the conduction losses and the switching losses, and a digital pulse width controller is proposed to compensate the turn off delay to prevent the reverse leakage current. The chip was fabricated with TSMC 0.18 µm 1 poly 5 metal BCD technology with an active area of 3.2 mm × 4.8 mm, and the measured performance of the system efficiency from the DC input of transmitter to the output of the receiver is achieved 88% at 12 V/1 A output.

An adaptive wideband frequency-sweeping algorithm and its application to full-wave analysis of multilayered structures SCIENTIA SINICA Informationis 47, 915 (2017); A low-jitter low-power monolithically integrated optical receiver for SDH STM-16 SCIENCE CHINA Information Sciences 54, 1293 (2011); SCIENCE CHINA Information Sciences

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