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Stress sensing test chips are widely utilized to investigate integrated circuit die stresses arising from assembly and packaging operations. In order to utilize these test chips to measure stresses over a wide range of temperatures, one must have values of six piezoresistive coefficients for n-and p-type silicon over the temperature range of interest. However, the literature provides limited data over the desired range, and even the data at room temperature exhibit wide discrepancies in magnitude as well as sign. Thus, this work focuses on an extensive experimental study of the temperature dependence of the fundamental piezoresistive coefficients, 11 12 , and 44 , for both p-and n-type silicon from 150 C to +125 C, as well as a number of useful combined coefficients.Measurements were performed using stress sensors fabricated on (001) silicon. In order to minimize errors associated with misalignment with the crystallographic axes on (001) silicon wafers, anisotropic wet etching was used to accurately locate the axes. Four-point bending (4PB) was used to generate the required stress in strip-on-beam samples, and finite-element simulations were used to determine the states of stress in the silicon material.

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