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This paper introduces a fully free and open source software (FOSS) architecture-neutral FPGA framework comprising of Yosys for Verilog synthesis, and nextpnr for placement, routing, and bitstream generation. Currently, this flow supports two commercially available FPGA families, Lattice iCE40 (up to 8K logic elements) and Lattice ECP5 (up to 85K elements) and has been hardware-proven for custom-computing machines including a low-power neural-network accelerator and an Open-RISC system-on-chip capable of booting Linux. Both Yosys and nextpnr have been engineered in a highly flexible manner to support many of the features present in modern FPGAs by separating architecture-specific details from the common mapping algorithms. This framework is demonstrated on a longest-path case study to find an atypical single source-sink path occupying up to 45% of all on-chip wiring.

RIEGL LIDAR instruments based on echo digitization and on-line waveform processing provide valuable attributes to every detected target: calibrated amplitude, calibrated estimated target reflectance, and echo pulse deviation. Additional attributes could be provided by employing enhanced algorithms. In hydrography an estimate for the backscattering coefficient of a water column, for topographic targets an estimate of the angle of incidence of the laser beam on flat targets can be determined. We present data sets based on on-line waveform processing of RIEGL's V-Line and assess the possibility of deriving additional attributes by performing more sophisticated analysis of the waveform.

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