A time-to-digital converter (TDC) based on residue number system is presented. This architecture can reduce hardware and chip area as well as power significantly compared to a flash-type TDC while keeping comparable performance. Its proof-of-concept prototype was implemented on FPGA, and the measurement results validate the effectiveness of the proposed architecture

This paper describes multi-band low noise amplifiers (LNAs) utilizing input matching transformers. We investigate a conventional dual-band LNA circuit utilizing a transformer, and show our analysis and simulation results for its circuit. Based on this, we propose a triple band LNA with transformers. We have calculated characteristics of the dual-band and triple-band LNAs. As the results, the LNAs show gain of 20dB while maintaining good input matching, in the frequencies at 2.59GHz, 3.50GHz and 5.41 GHz. Then we discuss configuration and design of coupling coefficients of the transformers.

This paper presents a power-efficient noise-canceling technique based on the feed-forward amplifiers, considering a fundamental tradeoff between noise figure (NF) and power consumption in the design of wide-band amplifiers. By suppressing the input signal of the noise cancellation amplifier, the nonlinear effect on the amplifier can be reduced, as well as the power consumption can be smaller. Furthermore, as a lower gain of the noise-canceling sub-amplifier can be achieved simultaneously, further reduction of the power consumption becomes possible. The verification of the proposed technique is conducted with Spectre simulation using 90nm CMOS process.