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The Plasma Electrode Pockels Cell (PEPC) subsystem is a key component of the National Ignition Facility, enabling the laser to employ an efficient four-pass main amplifier architecture. PEPC relies on a pulsed power technology to initiate and maintain plasma within the cells and to provide the necessary high voltage bias to the cells' nonlinear crystals. Ultimately, nearly 300 high-voltage, high-current pulse generators will be deployed in the NIF in support of PEPC.Production of solid-state plasma pulse generators and thyratron-switched pulse generators is now complete, with the majority of the hardware deployed in the facility. An entire cluster (one-fourth of a complete NIF) has been commissioned and is operating on a routine basis, supporting laser shot operations. Another cluster has been deployed, awaiting final commissioning. Activation and commissioning of new hardware continues to progress in parallel, driving toward a goal of completing the PEPC subsystem in late 2007.

Fan-Out Wafer Level Packaging (FOWLP) holds immediate promise for packaging semiconductor chips with higher interconnect density than the incumbent Wafer Level Chip Scale Packaging (WLCSP). FOWLP enables size and performance capabilities similar to WLCSP, while extending capabilities to include multi-device system-in-packages. FOWLP can support applications that integrate multiple heterogeneously processed die at lower cost than 2.5D silicon interposer technologies. Current industry challenges with die position yield after die placement and molding result in low-density design rules and the high-cost of accurate die placement. Efficiently handling die shift is essential for making FOWLP cost-competitive with other technologies such as FCCSP and QFN. This presentation will provide an overview of Adaptive Patterning, a new technology for overcoming variability of die positions after placement and molding. In this process, an optical scanner is used to measure the true XY position and rotation of each die after panelization. The die measurements are then fed into a proprietary software engine that generates a unique pattern for each package. The resulting patterns are dispatched to a lithography system, which dynamically implements the unique patterns for all packages within a panel. For system-in-packages, this process offers a unique advantage over a fixed pattern: each die shift can be handled independently. With a fixed pattern, the design tolerances need to be large enough for all die to shift in opposing directions, otherwise yield loss in incurred. With Adaptive Patterning, vias and RDL features remain at minimum size and are matched to the measured die shift. The die-to-die interconnects are dynamically generated and account for the unique position of each die. Thus, Adaptive Patterning retains the same high-density design rules regardless of how many die are in a package. Adaptive Patterning provides the capability to use high-throughput die placement to drive down cost, while enabling higher-density system-in-package interconnect. With this technology the industry can finally realize the cost, flexibility, and form factor benefits of FOWLP.