Quantum dot Cellular Automata (QCA) technology is a possible CMOS substitute. It requires a clock-like signal to assure information propagation. This likens a QCA circuit to a fully pipelined architecture, where pipeline depth is layout dependent. Only asynchronous organization of architectural blocks enables the realization of complex circuits. The use of Null Convention Logic (NCL) is one among the proposed solutions. However there is no certainty that the balance between positive and negative aspects of this logic will be favorable for QCA. We analyze pros and cons of NCL and Boolean logic circuits applied to QCA, using a VHDL behavioral model of QCA gates, in terms of speed, latency, power and area. We point out a critical problem related to feedback signals: Clearing it is mandatory in order to implement complex QCA circuits. Finally we propose a hybrid logic solution which is the best compromise between performance and problem solutions, and we give a sound answer to this paper title question.