In this paper a novel architecture of a DSP floating point, pipelined processor is presented which is based on the CORDIC and CCM algorithms. It provides for the Fist time a single hardware structure with a full set of elementary arithmetic operations which include circular and hyperbolic functions, square root, logarithm as well as multiplication and division. Its powerful functionality makes it an ideal processing element in high speed multiprocessor applications e.g. real time digital signal processing and matrix equation solving problems.

No abstract

No abstract

No abstract

No abstract