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This paper will describe the USAF Arnold Engineering Development Center (AEDC) technology efforts that provide signal processing and data system support for infrared (IR) Focal Plane Array (FPA) testing. The requirements for AEDC space sensor testing range from component-level FPA characterization to advanced mission simulation.The technology efforts underway address these requirements by developing hardware and software that meet AEDC' s generic needs for FPA testing. Component-level EPA characterization places unique requirements on system fidelity and bandwidth performance. Diversity in sensor types being tested and levels of sensor integration creates the need for versatility in data handling and sensor interfaces. Mission simulation requirements emphasize the need for extended data storage, system throughput, and data display capabilities. A signal processing system will be presented which addresses AEDC's requirements for component-level sensor operation, data acquisition, and flexible interface architectures that can be modified quickly to accommodate different sensor interfaces and data formats. The system will also address the need for high-speed storage of very large data arrays during mission simulation testing. Techniques used to verify and validate system operation will also be presented.AEDC has provided space sensor test services to government and industry for the past three decades. During this period, tremendous advances in sensor technology have pushed the test and evaluation (T&E) community's abilities in the support of current and future test requirements.The collective requirement for space sensor testing is built on the foundation of earlier T&E requirements studies performed by AEDC, Boeing, Hughes, and Nichols Research. These requirements were updated with data gathered from the 1989 and 1990 SDIO Scene Generation Workshop, the Tn-Service Scene Generation Working Group, DoD sensor technology developers, and industry sensor technology developers. Continual interfacing with industry and DoD sensor program offices keeps AEDC current with emerging requirements for future T&E capabilities. * The research reported herein was performed by the Arnold Engineering Development Center (AEDC), Air Force Material Command. Work and Analysis for this research were done by personnel of Micro Craft Technology Inc., Technical services contractor for the AEDC aerospace flight dynamics facility. Further reproduction is authorized to satisfy needs of the U.S. Government.

The Arnold Engineering Development Center (AEDC) Scene Generation Test Capability (SGTC) program has completed the development of a laser based Direct Write Scene Generation (DWSG) facility that provides dynamic mission simulation testing for infrared (IR) Focal Plane Arrays (FPAs) and their associated signal processing electronics.W The AEDC DWSG Focal Plane Array Test Capability (FPATC) includes lasers operating at 0.514, 1.06, 5.4, or 10.6 tm, and Acousto-Optic Deflectors (AODs) which modulate the laser beam position and amplitude. Complex Radio Frequency (RF) electronics control each AOD by providing multi-frequency inputs. These inputs produce a highly accurate and independent multibeam deflection, or "rake", that is swept across the EPA sensor under test. Each RF amplitude input to an AOD translates into an accurate and independent beam intensity in the rake. Issues such as scene fidelity, sensor frame rates, scenario length, and real-time laser beam position adjustments require RF control electronics that employ the use of advanced analog and digital signal processing techniques and designs. By implementing flexible system architectures in the electronics, the overall capability of the DWSG to adapt to emerging test requirements is greatly enhanced.Presented in this paper is an overview of the signal processing methodology and designs required to handle the DWSG requirement. Further, electronic design techniques that enabled the system to be implemented within program cost constraints will also be presented. These electronic designs include a broad range of disciplines including digital signal processing hardware and software, programmable logic implementations, and advanced techniques for high fidelity RF synthesis, switching, and amplitude control. Techniques for validating electronic performance will also be presented along with data acquired using those techniques.