The usual segmentation methods were addressed here: edge detection, clustering, and region growth. The problem with segmentation is that no one approach is suited for a certain type of picture, nor are all techniques applicable to all images. The importance of multiplication is rising according to the technology process. It is one of the major applications which is used in various domains such as business and digital signal process etc. The way of general multiplication is much more time taking process. So, mainly as to remove this time delay in this paper the concept of Vedic mathematics is introduced. This paper introduced about Indian ancient Vedic mathematics is involved to clear those problems. Sixteen sutras among the Vedic mathematics the one sutra that is widely used and implemented is “URDHVA-TIRYAGBHYAM” is proposed. The multiplication process of two 4 bit and two 3 bit and also two 2-bit multiplications are gone through this paper. This process ultimately leads to the consumption of less time and faster implementation. But, with respect to the order of multiplication, the complexity will also increase. When compared to other multipliers it takes less area.

\textit{Background} The proposed watermarking framework is based on the multi-resolution Walsh-Hadamard Transform (MR-WHT) along with Schur factorization. For embedding, the cover image is converted into a frequency domain using MR-WHT before Schur factorization is applied. \textit{Methods} The upper triangle's highest stable eigenvalues in the Schur factorization are employed as reliable embedding locations for the watermark. The singular values of these coefficients are updated with the singular values of the watermark, and the matrix array generated by the biggest eigenvalues is further factorised by singular value decomposition using multiple scaling factors and Differential evolution (DE). Later, an inverse SVD, inverse Schur, and inverse multiresolution Walsh-Hadamard transform is executed to obtain a watermarked image. \textit{Results} The simulation results show that the proposed method is imperceptible and robust against existing watermarking algorithms used in the literature.

High speed and power are required for modern applications, and low power consumption and a small integration area. So, this system will be consumed less power. To manipulate these problems either way of computing should be changed by another technique or the transistor should be changed by another device. One selective computing is stochastic. While loaded computing contributes high hardware cost, high speed. Stochastic computing accuracy is less than binary computing circuits. They are having some implementation basic operations of stochastic computing. They are complementary operation, multiplication operation, addition operation, subtraction operation, and division operation. These operations having some logic gates i.e., AND gate, NOT gate, XOR gate, an XNOR gate. And implement the hardware Tripartite synapse. It can be divided into parts. They are Astrocyte, Synapse, Input spiking, LIF neuron, and output spiking. Using stochastic circuits and conversion processes, this paper demonstrates the fundamental notions of stochastic computing. implementation of arithmetic operations and hardware tripartite synapse and tripartite synapse hardware architecture.

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