including sensor arrays on the chip itself is increasingly valuable, allowing more system integration, higher operating speeds, and the ability to include many sensor types in a single substrate for hyperspectral image analysis At the same time an important trend in digital cameras has been the move to a larger detector area (currently reaching 35 mm); while shrinking the actual pixel size, both creating enhance resolution. This combination of digital imagers growing ever larger in silicon area and pixel count with shrinking pixel areas, results in increasing defects during fabrication and the number of dead pixels that develop over the device's lifetime. This makes it essential to avoid defects in these megapixel detectors. Furthermore, in remote, dangerous environments such as outer space, high radiation areas, and military battlefields, digital cameras can image the scene at low cost and low risk. However, these environments put more stress on the imager system (from radiation, heat, or pressure), possibly leading to pixel failure, while making the replacement of failed systems difficult. Thus, to increase fabrication yield and extend operational lifetimes for these sensor areas, manufacturers need to develop selfcorrecting, self-repairing imagers for both cameras and SoC systems.Another recent trend in digital imager systems is the move from charge-coupled-device (CCD) detectors to CMOSbased active pixel sensors, which are easier to produce, cost less, use less power, and integrate easily with other processors. 1,2 Previously, we proposed an APS cell design that included redundancy, something that is not possible for CCDs, to enhance imager reliability. 3,4 This article extends that work by reporting on our implementation of the redundant-photodiode APS in a CMOS 0.18-micron process and our device testing in normal operating mode and in modes with various forms of defects. In addition to this hardware correction through redundant APS cells, we explore software correction techniques. 5-7 We have combined hardware correction with a new software correction algorithm to create an extremely reliable imaging system. To the best of our knowledge, such a combination has not previously appeared in the literature.
Redundant-pixel circuitOur hardware correction mechanism consists of dividing a single pixel in half into two active subpixel circuits working in parallel. Figure 1 shows a schematic diagram of the two circuits, connected to achieve a pixel with redundancy. The light detection mechanism of one active pixel circuit works as follows: In normal operation, the incident light increases the reverse bias A Self-Correcting Active Pixel Sensor Using Hardware and Software Correction Editors' note: Active pixel sensor (APS) CMOS technology reduces the cost and power consumption of digital imaging applications. This article presents a highly reliable system for the production of high-quality images in harsh environments. The system is based on a fault-tolerant architecture that effectively combines hardware redundancy in...
