As Moore’s law approaching its end, electronics is hitting its power, bandwidth, and capacity limits. Photonics is able to overcome the performance limits of electronics but lacks practical photonic register and flexible control. Combining electronics and photonics provides the best of both worlds and is widely regarded as an important post-Moore’s direction. For stability and dynamic operations considerations, feedback tuning of photonic devices is required. For silicon photonics, the thermo-optic effect is the most frequently used tuning mechanism due to the advantages of high efficiency and low loss. However, it brings new design requirements, creating new design challenges. Emerging applications, such as optical phased array, optical switches, and optical neural networks, employ a large number of photonic devices, making PCB tuning solutions no longer suitable. Electronic-photonic-converged solutions with compact footprints will play an important role in system scalability. In this paper, we present a unified model for thermo-optic feedback tuning that can be specialized to different applications, review its recent advances, and discuss its future trends.

Micro-ring resonator (MRR) is a key photonic device that has a wide range of applications but suffers from wavelength uncertainties. For almost all practical applications, a wavelength controller is required for each MRR. The wavelength controller is usually much larger than the MRR. With more complicated control algorithms, the controller size becomes even larger. Equipping each MRR with a wavelength controller will not be scalable. We propose a pipelined time-division-multiplexing (PTDM) control scheme that achieves high scalability while maintaining good loop bandwidth by exploiting the speed mismatch between the heater and the controller. To verify this proposed scheme, a hybrid integrated controller supporting four MRRs is designed. Measurement results show that it achieves a sine tracking speed of about 15 nm/s while achieving a locking accuracy of 7 pm and a tuning range of 9 nm.

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Due to the rise of 5G, IoT, AI, and high-performance computing applications, datacenter traffic has grown at a compound annual growth rate of nearly 30%. Furthermore, nearly three-fourths of the datacenter traffic resides within datacenters. The conventional pluggable optics increases at a much slower rate than that of datacenter traffic. The gap between application requirements and the capability of conventional pluggable optics keeps increasing, a trend that is unsustainable. Co-packaged optics (CPO) is a disruptive approach to increasing the interconnecting bandwidth density and energy efficiency by dramatically shortening the electrical link length through advanced packaging and co-optimization of electronics and photonics. CPO is widely regarded as a promising solution for future datacenter interconnections, and silicon platform is the most promising platform for large-scale integration. Leading international companies (e.g., Intel, Broadcom and IBM) have heavily investigated in CPO technology, an inter-disciplinary research field that involves photonic devices, integrated circuits design, packaging, photonic device modeling, electronic-photonic co-simulation, applications, and standardization. This review aims to provide the readers a comprehensive overview of the state-of-the-art progress of CPO in silicon platform, identify the key challenges, and point out the potential solutions, hoping to encourage collaboration between different research fields to accelerate the development of CPO technology. Graphical Abstract