Packet Classification serves as a plinth for many newly emerging network applications. Most of the previous packet classification schemes are IPv4-oriented, and some of them have achieved high throughput with chip-level parallelism of Ternary Content Addressable Memories (TCAM). However, due to their inefficient utilization of TCAM resources, further upgrade incurs prohibitive hardware costs. As IPv6 will dominate the Next Generation Internet, IPv6-oriented packet classification is of increasing importance. In this paper, we propose a packet classification scheme geared towards IPv6. This scheme incorporates efficient and flexible algorithms for parallelism and distributed storing, which provides an unprecedentedly high throughput with relatively low storage costs. Our scheme also integrates delicate parallel encoding algorithms to maximize the TCAM utilization and increase its throughput. Using commercially available TCAM, the scheme is able to classify 266 million IPv6 packets per second (Mpps), matching 4× OC-768 (160 Gbps) line rate.

Packet classification algorithms are increasingly being used to provide security and Quality of Service guarantees. These algorithms are usually implemented on power hungry programmable network processors, which are used in devices such as core routers and firewalls. This paper compares the energy used by five best-known algorithms Recursive Flow Classification, HiCuts, HyperCuts, Extended Grid-of-Tries with Path Compression and Tuple Space Search with Pruning. It does this by measuring the energy used to build the search structure during preprocessing for each of the five algorithms and the average energy taken to classify a packet. To do this we implemented all five algorithms in C code and used a microarchitectural power simulation tool called Sim-Panalyzer to estimate the power dissipated by the five algorithms while running on a SA 100 StrongARM RISC processor similar to the type found on many of today's programmable network processors.

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