No abstract

No abstract

No abstract

Abstract-A fully integrated 5.8 GHz Class AB linear power amplifier (PA) in a standard 90 nm CMOS process using thin oxide transistors utilizes a novel on-chip transformer power combining network. The transformer combines the power of four push-pull stages with low insertion loss over the bandwidth of interest and is compatible with standard CMOS process without any additional analog or RF enhancements. With a 1 V power supply, the PA achieves 24.3 dBm maximum output power at a peak drain efficiency of 27% and 20.5 dBm output power at the 1 dB compression point.Index Terms-CMOS power amplifier, power amplifiers, power combiners.

The opening up of the mm-wave band has created opportunities for high-data-rate communication, radar and medical imaging. The cost and size advantages of CMOS have motivated research on 60GHz CMOS front-end design [1]. However, very few CMOS mmwave power amplifiers (PAs) have been reported so far. Furthermore, most of the mm-wave PAs reported use bulky transmission lines [2,3], increasing silicon area and incurring higher substrate losses.We demonstrate a fully integrated 60GHz transformer-coupled two-stage differential power amplifier with single-ended input and output in 90nm digital CMOS with no RF process options. This work uses on-chip transformers for a 60GHz PA as an integrated CMOS solution. Operating from a 1V supply, it achieves a 1dB compressed output power of +9dBm and saturated power of +12.3dBm. The chip occupies an area of only 660×380µm 2 by taking advantage of the extensive use of small transformers.Transformers are attractive as they can simultaneously perform impedance transformation and differential-to-single-ended conversion. In a multistage design, they also provide easy DC biasing. In this design, a 1:1 vertical transformer is built with two coupled loop inductors. The diameter of the loop inductors is an important design metric. For very small sizes, the impedance of the shunt magnetizing inductance becomes too small and most of the signal current is lost through it. A large transformer results in higher substrate losses and an increased series leakage inductance which also reduces the signal transfer to the secondary winding [4].Transformers with different diameters and trace widths have been implemented with the top two metal layers. Figure 31.2.1 shows the simulated minimum insertion loss of 60GHz transformers, clearly indicating how the size can be optimized. Figure 31.2.2 shows the measured insertion loss versus frequency of a vertical transformer with a 42μm diameter and 8μm trace width. At 60GHz, the loss is below 0.9dB, showing the potential of transformers at these frequencies. The measured S 21 shows the broadband nature of transformers, with 3dB bandwidth close to 30GHz.The design of the PA is a simultaneous optimization of output power, power gain and efficiency while ensuring unconditional stability over all frequencies. The implemented circuit is shown in Fig. 31.2.3. It consists of two differential amplifier stages and optimized transformers for input, inter-stage, and output matching and differential-to-single-ended conversion. Note that the use of transformers eliminates the need for AC coupling capacitors and RF chokes while differential operation reduces the amount of bypass capacitance needed.A difference in mm-wave PA design versus lower frequencies is a pronounced limitation on the maximum device width. Choosing the size of the output NMOS transistor is a compromise between maximum stable gain (MSG) and maximum output power. For high gain, the width of a finger (W F ) needs to be small enough. But for high output power, the total width (W) needs to be large. This mean...