Lattice images by transmission electron microscopy (TEM) were used to find new interfaces formed between c-and/or t-ZrO 2 nanocrystals. The ZrO 2 nanocrystals, prepared by ion-beam sputtering on a NaCl (100) plane, coalesced to form a straight {220}/{200} interface and a stepped {200}/{111} interface with misfit dislocations. The former is characterized by a good match of O 2-lattice sites and smooth joining of low index planes across it without mismatch and dislocation. The special interfaces are applicable to fcc nanocrystals in general. The atomic structure of the new interface, however, can be studied further with an atomic-resolution TEM

The TiO to anatase phase transformation has been studied by transmission electron microscopy in this Article. It is shown that prior formation of TiO from Ti film can induce the formation of anatase by thermal oxidation in air; otherwise only rutile is formed. Ti film deposited on the NaCl (001) surface is induced to form epitaxial TiO film by thermal oxidation in air. Further thermal oxidation in air partially transformed TiO into anatase (A) with a parallel orientation relationship of {200}A//{200}TiO. Detailed analysis of the lattice fringes image of the specimen reveals the presence of very high density of misfit dislocations. The TiO to anatase transformation is reversible as further annealing in a vacuum can turn the anatase back into TiO and eliminates the misfit dislocations. The transformation is analyzed in terms of the crystal structure, orientation relationship, and the dislocation distribution, which show that the TiO to anatase transformation is due to the close similarity between their structures.

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Traditionally, a large number of silicon oxide materials are extensively used as various dielectrics for semiconductor industries. But silicon oxide cannot be used as resistance random access memory (RRAM) due to its native electrical properties. In this work, based on the concept of inducing defect by metal doping into insulator, silicon oxide with a few tin dopants at room temperature can successfully be used as switching layer in RRAM. According to electrical analyses, the current transport mechanism in Sn-doped silicon oxide is governed by Pool-Frenkel emission, which demonstrates the conduction path in the RRAM guided by Sn doping induced defect.Recently, the increasing demands for portable electronic products, nonvolatile memory has been widely applied as information storage device due to its low power consumption properties. Modern semiconductor nonvolatile memories are scaled constantly to achieve large capacity while device features approach the sub-100-nm regime. Nevertheless, for conventional charge storage-based memories, 1-4 the increasing demand for device densities by scaling dimension is expected to be a major challenge due to the technical and physical limitation. To overcome the issue, alternative memory technologies have been widely investigated, including a magnetic random access memory (MRAM), a phase change random access memory (PCRAM), a polymer random access memory (PRAM), and a resistive random access memory (RRAM). Among these memories, RRAM composed of an insulating layer sandwiched by two electrodes is a great potential candidate for next-generation nonvolatile memory due to their superior properties such as low cost, simple structure, fast operation speed, and nondestructive readout. 5,6 Various materials have been reported to possess resistive switching behaviors, such as perovskite oxides (PrCaMnO 3 , SrZrO 3 ), 7, 8 transition metal oxides (NiO, ZnO, CrO, CoO), 9-12 and organic material. 13 In addition, many switching mechanism of RRAM have been proposed to explain resistive switching phenomenon, such as conductive filaments, 14 valence change, 15 and schottky barrier. 16 However, the underlying mechanism of resistive switching behavior is still not yet understood clearly. Silicon-based oxide is a promising material for RRAM applications because of its great compatibility in metal oxide semiconductor (CMOS) process. Therefore, the research using silicon-based oxide as the resistance-switching layer was worthy of investigation. Kozicki et al. 17 have studied the resistive switching characteristics of Cu/SiO 2 /W structure. They utilized high temperature treatment at 610 • C to drive Cu into SiO 2 to form filament and to result in resistive switching behavior. However, the high driving temperature is not suitable to the backend of line (BEOL) process for CMOS integration technology.In this work, tin metal doped into silicon oxide by co-sputtering at room temperature was taken as the resistance switching layer of RRAM. To evaluate the resistive switching properties of tin-doped silico...