Elliptic curve digital signature algorithm (ECDSA) is elliptic curve analogue of digital signature algorithm. This paper presents implementation of ECDSA on NIST recommended Elliptic curves in binary fields of size 163 bits. The work involved implementation of different modules of ECDSA on reconfigurable hardware platform (Xilinx xc6vlx240T-1ff1156). The private key generation and binary weight calculation (used in scalar multiplication) is done in software using Microblaze (soft core of Xilinx). The private key along with the other global parameters for ECDSA are passed from Microblaze to the programmable logic of FPGA where final signature generation and verification is performed. Two implementations have been done based on different word sizes in Montgomery multiplication over binary fields. The first implementation requires 0.367 ms with 11040 slices for signature generation and 0.393 ms with 12846 slices for signature verification at a clocking frequency of 100 MHz. The second implementation requires 0.615 ms with 8773 slices for signature generation and 0.672 ms with 9967 slices for signature verification at the same clocking frequency. These implementations are faster compared to other implementations reported in literature for binary curves.
Abstract. We present a Message Authentication Code (MAC) with integrated error correction capability, called AEC. The MAC itself can detect/correct errors upto a certain limit and provides an estimate of the number and location of the errors. The security of AEC lies in the random selection of the underlying error correcting code (ECC). In this work, we propose a new on-the-fly solution to this problem of random ECC selection, making it highly secure. Moreover, this solution combined with the simple and regular structure of Cellular Automata (CA) based ECC, makes it highly suitable for efficient hardware implementation. Detailed FPGA implementations of both standalone and compact variants of AEC, are presented on the Spartan-3 FPGA platform. The compact implementation has low area footprint and high throughput making it particularly suitable for resource constrained applications. To the best of our knowledge this is the only practical design of an ECC-MAC scheme.
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