No abstract

Temperature dependence performance variation is one of the major concerns in predicting the actual electrical characteristics of the device as the bandgap of semiconducting material varies with temperature. Therefore, in this article, for the first time the impact of temperature variations ranging from 300K to 450K on the DC, analog/ radio frequency, and linearity performance of dual material stack gate oxide-source dielectric pocket-tunnel- field-effect transistor (DMSGO-SDP-TFET) is investigated. In this regard, technology computer-aided design (TCAD) simulator is used to analyze DC, and analog/radio frequency performance parameters such as carrier concentration, energy band variation, electric field variation, IDS - VGS characteristics, transconductance (gm), cut o frequency (f T ),gain-bandwidth product (GBP), maximum oscillating frequency (fmax), transconductance frequency product (TFP), and transit time considering the impact of temperature variations. Furthermore, linearity parameters such as third-order transconductance (gm3), third-order voltage intercept point (VIP3), third-order input-interception point (IIP3), and intermodulation distortion (IMD3) are also analyzed with temperature variations as these performance parameters are significant for linear and analog/radio frequency applications. Moreover, the performance of the proposed DMSGO- SDP-TFET is compared with the conventional dual-material stack gate oxide-tunnel- field-effect transistor (DMSGO-TFET). From the comparative analysis, in terms of % per kelvin, DMSGO-SDP-TFET demonstrates lesser sensitivity towards temperature variation. Hence, the proposed DMSGO-SDP-TFET can be a suitable candidate for low power switching and analog/radio frequency applications at elevated temperatures as compared to conventional DMSGO-TFET.

In this paper, for the first time, we use a distinctive approach based on oxide strip layer in dual material stack gate oxide-tunnel field-effect transistor (DMSGO-OSL-TFET) to improve the DC, analog/RF, and linearity performance. For this, a stack gate oxide with workfunction is considered to enhance the ONstate current (ION ) and reduce the ambipolar current (Iamb). For this case, the gate electrode is tri-segmented, named as tunnel gate (M1), control gate (M2) and auxiliary gate (M3) with different gate lengths (L1, L2, L3) and work functions (φ1, φ2, φ3), respectively. To maintain dual-work functionality, the possible combinations of these work functions are considered. Technology computer-aided design (TCAD) simulations are performed and noted that the workfunction combination (φ1 = φ3 < φ2) outperforms compared to other structures. Where φ1 on the source side is used to enhance the ION , while φ3 (equal to φ1) is used on the drain side to minimize the Iamb. To further enhance the device performance, a high-K oxide strip layer is considered on the drain side to suppress the (Iamb) whereas, a low-K oxide strip layer is used at the source junction to maximize the ION . Moreover, length of gate segments, oxide strip layer height, and thickness are optimized to achieve a better ION , switching ratio, subthreshold swing (SS) and reduce the (Iamb) which helps in the gain of device and design of analog/RF circuits. The proposed device as compared to dual material control gate-oxide strip layer-TFET (DMCG-OSL-TFET) shows improvement in ION /IOF F (∼ 4.23 times), 84 % increase in transconductance (gm), 136 % increase in cut-off frequency (fT ), 126 % increase in gain bandwidth product (GBP), point subthreshold swing (15.8 mV/decade) and other significant improvements in linearity performance parameters such as gm3, VIP3, IIP3, IMD3 making the proposed device useful for low power switching, analog/RF and linearity applications.

Temperature-induced performance variation is one of the main concerns of the conventional stack gate oxide double gate tunnel field-effect transistor (SGO-DG-TFET). In this regard, we investigate the temperature sensitivity of extended source double gate tunnel field-effect transistor (ESDG-TFET). For this, we have analyzed the effect of temperature variations on the transfer characteristics, analog/RF, linearity and distortion figure of merits (FOMs) using technology computer aided design (TCAD) simulations. Further, the temperature sensitivity performance is compared with conventional SGO-DG-TFET. The comparative analysis shows that ESDG-TFET is less sensitive to temperature variations compared to the conventional SGO-DG-TFET. Therefore, this indicates that ESDG-TFET is more reliable for low-power, high-frequency applications at a higher temperature compared to conventional SGO-DG-TFET.

In this article, the impact of high-K and low-K dielectric pockets on DC, analog/RF, and linearity performance parameters of dual material stacked gate oxide-dielectric pocket-tunnel field-effect transistor (DMSGO-DP-TFET) is investigated. In this regard, a stacked gate oxide (SiO2 + HfO2) with workfunction engineering is taken into consideration to improve the ON-state current (ION ), and suppress the ambipolar current (Iamb). To further improve the performance of the device, a high-K dielectric pocket (HfO2) is used at the drain-channel interface to suppress the Iamb, and at the source-channel interface a low-K dielectric pocket is used to improve the ION and analog/RF performance. Moreover, length of stacked gate segments (L1, L2, L3), pocket height, and thickness are optimized to attain better ION /IOFF ratio, and suppress the Iamb which helps to achieve higher gain and design of analog/RF circuits. The DMSGO-DP-TFET outperforms the dual material control gate-dielectric pocket-TFET (DMCG-DP-TFET) with SiO2 gate oxide and shows increment in ION /IOFF (∼ 4.23 times), 84 % increment in transconductance (gm), 136 % increment in cut-off frequency (fT ), 126 % increment in gain-bandwidth-product (GBP), and better linearity performance parametrs such as gm2 ,gm3, VIP2, VIP3 and IIP3 making the proposed device useful for low power and radio frequency applications.