Abstract2D van der Waals (vdW) materials have been considered as potential building blocks for use in fundamental elements of electronic and optoelectronic devices, such as electrodes, channels, and dielectrics, because of their diverse and remarkable electrical properties. Furthermore, two or more building blocks of different electronic types can be stacked vertically to generate vdW heterostructures with desired electrical behaviors. However, such fundamental approaches cannot directly be applied practically because of issues such as precise alignment/positioning and large‐quantity material production. Here, these limitations are overcome and wafer‐scale vdW heterostructures are demonstrated by exploiting the lateral and vertical assembly of solution‐processed 2D vdW materials. The high exfoliation yield of the molecular intercalation‐assisted approach enables the production of micrometer‐sized nanosheets in large quantities and its lateral assembly in a wafer‐scale via vdW interactions. Subsequently, the laterally assembled vdW thin‐films are vertically assembled to demonstrate various electronic device applications, such as transistors and photodetectors. Furthermore, multidimensional vdW heterostructures are demonstrated by integrating 1D carbon nanotubes as a p‐type semiconductor to fabricate p–n diodes and complementary logic gates. Finally, electronic devices are fabricated via inkjet printing as a lithography‐free manner based on the stable nanomaterial dispersions.

This paper describes how delamination-free, hierarchical patterning of graphene can be achieved on prestrained thermoplastic sheets by surface wrinkling. Conformal contact between graphene and the substrate during strain relief was maintained by the presence of a soft skin layer, resulting in the uniform patterning of three-dimensional wrinkles over large areas (>cm). The graphene wrinkle wavelength was tuned from the microscale to the nanoscale by controlling the thickness of the skin layer with 1 nm accuracy to realize a degree of control not possible by crumpling, which relies on delamination. Hierarchical patterning of the skin layers with varying thicknesses enabled multiscale graphene wrinkles with predetermined orientations to be formed. Significantly, hierarchical graphene wrinkles exhibited tunable mechanical stiffness at the nanoscale without compromising the macroscale electrical conductivity.

Soft skin layers on elastomeric substrates are demonstrated to support mechano-responsive wrinkle patterns that do not exhibit cracking under applied strain. Soft fluoropolymer skin layers on pre-strained poly(dimethylsiloxane) slabs achieved crack-free surface wrinkling at high strain regimes not possible by using conventional stiff skin layers. A side-by-side comparison between the soft and hard skin layers after multiple cycles of stretching and releasing revealed that the soft skin layer enabled dynamic control over wrinkle topography without cracks or delamination. We systematically characterized the evolution of wrinkle wavelength, amplitude, and orientation as a function of tensile strain to resolve the crack-free structural transformation. We demonstrated that wrinkled surfaces can guide water spreading along wrinkle orientation, and hence switchable, anisotropic wetting was realized.

Multi-valued logic gates are demonstrated on solution-processed molybdenum disulfide (MoS2) thin films. A simple chemical doping process is added to the conventional transistor fabrication procedure to locally increase the work function of MoS2 by decreasing sulfur vacancies. The resulting device exhibits pseudo-heterojunctions comprising as-processed MoS2 and chemically treated MoS2 (c-MoS2). The energy-band misalignment of MoS2 and c-MoS2 results in a sequential activation of the MoS2 and c-MoS2 channel areas under a gate voltage sweep, which generates a stable intermediate state for ternary operation. Current levels and turn-on voltages for each state can be tuned by modulating the device geometries, including the channel thickness and length. The optimized ternary transistors are incorporated to demonstrate various ternary logic gates, including the inverter, NMIN, and NMAX gates.

Inkjet printing is a cost-effective and scalable way to assemble colloidal materials into desired patterns in a vacuum- and lithography-free manner. Two-dimensional (2D) nanosheets are a promising material category for printed electronics because of their compatibility with solution processing for stable ink formulations as well as a wide range of electronic types from metal, semiconductor to insulator. Furthermore, their dangling bond-free surface enables atomically thin, electronically-active thin films with van der Waals contacts which significantly reduce the junction resistance. Here, we demonstrate all inkjet-printed thin-film transistors consisting of electrochemically exfoliated graphene, MoS2, and HfO2 as metallic electrodes, a semiconducting channel, and a high-k dielectric layer, respectively. In particular, the HfO2 dielectric layer is prepared via two-step; electrochemical exfoliation of semiconducting HfS2 followed by a thermal oxidation process to overcome the incompatibility of electrochemical exfoliation with insulating crystals. Consequently, all inkjet-printed 2D nanosheets with various electronic types enable high-performance, thin-film transistors which demonstrate field-effect mobilities and current on/off ratios of ~10 cm2 V−1 s−1 and >105, respectively, at low operating voltage.