Component-based software engineering offers a way to break complex systems into well-defined parts. Self-adaptive mechanisms are crucial to enable run-time reconfiguration and increase parts reuse in other computer systems and environments. These systems must satisfy functional and nonfunctional requirements. Despite efficient data integration being a common aspiration, the practicality of achieving interoperability remains a challenge for quickly transforming functional processes. For other components work together with the existing ones, and for the new system components development to operate seamlessly with and among other systems, while maintaining proprietary information integrity, the adoption of a common set of "building codes" is required. This paper proposes a self-adaptive framework for a real-time system through a scope analysis of stakeholders' requirement. It implements generic behavioral models for Systems Servers and Invokers. Changes on a statechart dimension while adapting a system to the framework lead software engineers to a nearly transparent integration process. Platform dependencies are also captured separately, enabling code-generation subsystem to reuse same components across a wide range of heterogeneous platforms and real-time systems. The framework can lead software components to high degrees of cost-effective reuse and it is tested in a real-time system prototype developed in the Brazilian Aeronautical Institute of Technology (Instituto Tecnológico de Aeronáutica -ITA). The proposed framework focused on self-adaptive services components at run-time and on an efficient interoperability approach. At the end, functional requirements and the software architectural structure are enforced such that the end-to-end timing behavior of the resulting system and its specifications can be verified.

No abstract

No abstract

The objective of this article is to present a comparative study of an embedded processor performance using architecture with cache or scratchpad memory in relation to an architecture with only external Synchronous Dynamic Random Access Memory. For this analysis the ADSP-BF533 of Analog Devices, a high performance processor, was used. The adjusted memory space was configured and analyzed during the process of a small data volume, and great data volume, in three different speeds of the core, and in one same speed of the processor external memory. The scratchpad memory has shown better performance in programs with small data volume; however the cache memory had a better performance for large data allocation.

The purpose of this paper is to describe the state of the practice in creating a proper environment for Geographic Information Systems -GIS connected to the ORDBMS Oracle10g Spatial. It presents the main results of a Database Systems Project developed in classroom during the first semester of 2006 at the Brazilian Aeronautics Institute of Technology -ITA. International Conference on Information Technology (ITNG'07) 0-7695-2776-0/07 $20.00 © 2007 International Conference on Information Technology (ITNG'07) 0-7695-2776-0/07 $20.00