In this paper, we report on the fabrication and modeling of a CMOS-compatible silicon-embedded high-Q integrated inductor (µH range). The fabrication process is based on DRIE, pulse-reverse super-conformal electroplating of copper and chemical–mechanical polishing. A lumped-element equivalent circuit model based on electromagnetic finite-element simulations for the determination of the element values was also developed. Inductors with different geometric design parameters were simulated to show the optimization possibility using the model. A Q-factor of over 60 (at 30–40 MHz) for a 2 µH inductor was measured, which is the highest reported in the literature for integrated inductors at such frequencies. The measurement results closely match the simulations from the lumped circuit model.

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This paper discusses the design and implementation of a compact RF Front-End-Module for 802.11a/b/g/n application. A high performance embedded passives technology has been developed by extending existing multilayer FCBGA packaging substrate technology to include thin film capacitors, resistors and spiral inductors. Using these basic elements, all of the passive building blocks for the RF front-end module (FEM) have been designed and characterized individually. Several of these building blocks have then been used in combination with surface mounted active dies to realize a dual-band one-transmit/one-receive WiFi FEM with dimensions of 8 mm x 8mm x 1mm. Preliminary measurements indicate small signal gain of 10dB at 2.4 GHz for the Rx chain Index Terms -Embedded Passives, RF Packaging, RF FrontEnd-Module, Wireless Module, WiFi, FCBGA.