The leakage current of p-n junctions is one of the important parameters that degrades the performance of devices such as transistors, photodiodes, etc. It is well known that excess leakage current of p-n junction diodes can be caused by the presence of crystalline defects 1 or metal contamination, 2 introduced during device processing. However, decades of defect engineering studies have provided semiconductor manufacturing with powerful tools for defect and contamination control, e.g., internal and external gettering. 3 Finally, the presence of high mechanical stress levels at the field isolation regions of the junctions can lead to the generation of extended defects 4,5 and yield-related problems, as recently demonstrated in Ref. 5. In this paper the impact of specific processing steps compatible with a 0.35 m complementary metal-oxide semiconductor (CMOS) process on the diode leakage and yield are studied and discussed. Infrared light scattering tomography (IR-LST) is used wherever applicable for analyzing the diodes. ExperimentalDevice fabrication.-In these experiments 6 in. (150 mm) Si<100> oriented, Czochralski-grown p-type wafers with a resistivity of 16-24 ⍀ cm were used. The n ϩ p diodes were formed in a p-type substrate or in a p-well. The boron doping density in the p-type substrate is less than 10 15 cm Ϫ3 and in the p-well about 2 ϫ 10 17 cm Ϫ3 . Device isolation is made using two isolation techniques, namely, conventional local oxidation of silicon (LOCOS) (60 nm pad oxide/120 nm Si 3 N 4 ) and poly buffered locos (PBL) (20 nm pad oxide/50 nm amorphousSi/200 nm Si 3 N 4 ). After nitride etch, field implantation was performed (1.5 ϫ 10 13 cm Ϫ2 B at 120 keV) for diodes in p-type substrates with LOCOS and PBL isolations to counter substrate inversion at the isolation-substrate interface, followed by an anneal in N 2 ambient at 975ЊC. The field implantation dose was not varied because it had no influence on the effects studied in this work. The field oxide was grown at 975ЊC in H 2 /O 2 to a thickness of 500 nm. After LOCOS and PBL etchback removal of the active-region blocking layers, a sacrificial oxide of 50 nm was grown at 950ЊC in H 2 /O 2 . The p-well was made using boron with doses in the range 10 12 to 10 13 cm Ϫ2 implanted at several energies. n ϩ p diodes were formed using As ϩ implantation at 75 keV with doses of about 10 15 cm Ϫ2 , followed by a furnace anneal (FA) at 900ЊC or rapid thermal anneal (RTA) at 1100ЊC. Ramp-up and ramp-down rates for RTA are 50ЊC/s and have been kept constant. The carrier concentration of the n ϩ layer after activation is about 10 20 cm Ϫ3 . After FA the junctions are 0.2 m deep and after RTA the depth is 0.17 m, as obtained from spreading resistance profiling (SRP) and secondary ion mass spectroscopy (SIMS) measurements. The diodes are directly contacted by AlSiCu metal with a Ti/TiN barrier layer. Finally, a sintering treatment at 420ЊC in H 2 /N 2 was performed.Device characterization and parameter extraction.-Automatic measurements of the leakage current at 5...
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