Decades after the invention of the Cockcroft–Walton voltage multiplier, it is still being used in broad range of high voltage and ac to dc applications. High voltage ratio and high efficiency are its main features. Due to the limitations of original circuit, reducing the output ripple and increasing the accessible voltage level motivated scientists to propose new topologies. However, over the worldwide bibliography, most of Cockcroft-Walton voltage designers persist in using equal capacitances in every stage without considering an optimal design. The aim of this paper is to do a comparative study of the design and simulation of a fixed model (conventional model used by most authors) and a variable model (new design) of generating High Voltage Direct Current (HVDC) based on Cockcroft–Walton voltage multiplier that stresses on the choice of the adequate capacitance values to reduce the output voltage drop, produce less ripple and the calculations of the optimal number of stages that is necessary to produce the desired output voltage with a better performance. The generation of HVDC based on Cockcroft–Walton voltage multiplier and an eight stage was used for simulations and theoretical analysis which yielded up to 4.4 kV DC from an input voltage of 230 V, 50 Hz ac supply. The results are compiled from the simulations done on MATLAB/SIMULINK, by the designs and simulations characteristics of the models the performances, output voltages and ripple voltages per stage have been compared.