The use of metallic lithium anodes enables higher energy density and higher specific capacity Li‐based batteries. However, it is essential to suppress lithium dendrite growth during electrodeposition. Li‐ion‐conducting ceramics (LICC) can mechanically suppress dendritic growth but are too fragile and also have low Li‐ion conductivity. Here, a simple, versatile, and scalable procedure for fabricating flexible Li‐ion‐conducting composite membranes composed of a single layer of LICC particles firmly embedded in a polymer matrix with their top and bottom surfaces exposed to allow for ionic transport is described. The membranes are thin (<100 μm) and possess high Li‐ion conductance at thicknesses where LICC disks are mechanically unstable. It is demonstrated that these membranes suppress Li dendrite growth even when the shear modulus of the matrix is lower than that of lithium. It is anticipated that these membranes enable the use of metallic lithium anodes in conventional and solid‐state Li‐ion batteries as well as in future LiS and LiO2 batteries.

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The increasing production costs of electronic devices and changes in the design methods of integrated circuits (ICs) has led to emerging threats in the microelectronics industry. Today, high value chips are the target of counterfeiting, theft and malicious hardware insertion (such as hardware trojans). Intellectual property (IP) protection has become a major concern and we propose to fight counterfeiting and theft by designing salutary hardware (salware). Instead of insert malicious effects inside an IP like a malware (e.g. a hardware trojan), a salware uses the same techniques, strategies and means for IP protection. One of the most studied salware is IP watermarking. Many works propose to target the finite state machine of digital IP to perform the watermarking. But, most of the time, the verification of the watermark is not clearly described. This conduces to a lack of credibility of these works. This paper proposes a watermark verification scheme using a correlation analysis based on the measurement of the IC power consumption. This article presents this process of verification and also discusses the selection of its parameters according to experimental results.

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