International audienceIncreasing the number of bits per cell and technology scaling are ways to reduce the cost per gigabyte of flash memories and solid-state drives (SSDs). Unfortunately, this trend has a negative impact on data retention capability and cycling endurance. Periodic data refresh allows dealing with a reduced retention time and, indirectly, may be used to improve cycling endurance. A worst case data refresh frequency is not optimal in the presence of important temperature variations as it may become unnecessarily pessimistic and alter the SSD response latency and energy consumption. Here, a flexible data refresh methodology is proposed based on approximations of the Arrhenius-curves employed to describe the temperature impact on the retention capability of flash memories. These approximations may be implemented with the help of a small module called A-timer. For an asymmetric temperature distribution between 30°C and 70°C, it is estimated that the refresh frequency can be reduced by more than 63× and almost 3× for respectively charge detrapping and SILC failure mechanisms

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International audienceThis paper presents resistive sensor interface circuit for high temperature applications. The presented circuit has a time-domain differential architecture. It is based on the use of voltage-controlled phase shifters to perform the signal conditioning in time domain which makes it more robust the environment's parameters, in particular the temperature. The output of the presented senor interface depends only on relative parameters of the circuit, therefore; a low sensitivity to temperature variations is achieved. The low variation of the circuit output versus temperature has been demonstrated by simulations and measurements of the fabricated prototype