No part of this work may be reproduced, stored in a retrieval system, or transmitted in any form or by any means, electronic, mechanical, photocopying, microfilming, recording or otherwise, without written permission from the Publisher, with the exception of any material supplied specifically for the purpose of being entered and executed on a computer system, for exclusive use by the purchaser of the work.Printed on acid-free paper Springer is part of Springer Science+Business Media (www.springer.com) PrefaceThe design of power amplifiers (PA) for wireless applications has been a topic of great concern among the scientific community in electronics since the early 1990s. Power amplifiers dominantly determine the power efficiency and battery lifetime of modern mobile terminals. PA linearity is a key feature that limits the maximum allowed data rate of a radio link. The deployment of always more complex radio networks with a continuously growing throughput sharpens the specifications of power amplifiers. The market of wireless handsets (cellular phones, . . .) pushes manufacturers towards multi-standard capabilities (3G, Bluetooth, WIFI) and a growing level of integration. The Bill-of-Material and the consumed die area that are affordable are constantly reduced for cost purpose. The trade-offs that are inherent to PA design are therefore extremely stringent and no technical/technological solution can unanimously be regarded as a definitive contribution. To this date, the market of handset-dedicated power amplifiers is widely dominated by III/V technologies. However, throughout the following pages, we will try to highlight the benefits of PA integration on silicon. The architectures that will be proposed hereunder take advantage of silicon capabilities and strength, among others their relatively low cost and their ability to combine high power devices with low-power analog/digital control circuitry.Chapter 1 will first present the respective features of 2nd and 3rd generation cellular applications (GSM, DCS, EDGE, WCDMA. . .) and data transmission standards (WIFI, WIMAX, LTE). An overview of the most commonly employed RF power amplifier topologies will also be provided, with their advantages and drawbacks. Finally, the 0.25 µm BICMOS ST Microelectronics technology will be described and compared with III/V processes in the prospect of PA development. The fundamental features of power devices will be detailed and the most appropriate technological choice prior to the PA design itself will be discussed.In Chapters 2 and 3, several novel PA topologies will be proposed and discussed in terms of efficiency, linearity and complexity by means of mixed system/transistorlevel analyses. Chapter 2 will investigate three novel switched-mode power amplifier topologies. The first non-constant-gain principle is based on the power stage bypass/extinction and applied to a silicon HBT demonstrator. A silicon HBT demonstrator that was developed in the frame of RNRT ASTURIES project will be v vi Preface presented The other two topologies...