No abstract

This article presents a polarization-switchable Microstrip Patch Antenna (MPA) that can be flexibly reconfigured. There are little parasitic patches connected to the corners of an MPA's circular patch as a radiator. The PIN diodes have made contact with O-shaped parasitic patch elements to form the circular patch. When the truncated corners are changed, enhanced the impedance bandwidth and axial ratio bandwidth has been obtained. 3.24 GHz is a resonant frequency for an impedance match (S11 less than 10dB) and for an axial ratio (AR less than 3 dB). The antenna's ability to transition between left- and right-handed circular polarizations (LHCP and RHCP) was verified by comparison of simulated and measured results observed. Vector Network Analyzer has also been used to evaluate the anticipated MPA under high RF strength in an anechoic room. Thus, the 5G networks and their related applications have been shown to work with these observed characteristics.

Adders are used in processing units such as Arithmetic and Logic Units (ALUs) as an essential building block, and in many blocks of microprocessor chips critical path, adders occupy an important place. Hence reducing power, area and increasing the speed of adders are significantly important. This paper proposes a modified structure of Carry Skip Adder (CSKA) with a reduction in consumption of power and area without affecting the speed when compared with the conventional adder structures. In order to get better effectiveness of the modified CSKA by including concatenation, incrementation schemes, and variable latency for the proposed hybrid structure, which reduces the power utilized without affecting the operating speed of the adder. The modified structure in CSKA helps in improving the slack time, which further reduces the voltage with the parallel structure. Experimental results show that the 32-bit implementation of the proposed adder has a significant power reduction of 42% and 38.3%, area reduction of 27%, and 18.3% with respect to Conventional CSKA and CI CSKA adder with a little over ahead in delay. The proposed adder is used to implement a 5-tap FIR filter which shows a significant reduction in power consumption and area.

No abstract