This paper presents the performance of optimal filtering; LMS with a nonvolatile analog memory cell fabricated through 1.2um CMOS process, for the adaptive identification signal problem, where transfer functions are unknown and changing. The memory stores the weight in the filter as charge on the floating gate of a transistor pMOS. The update is linear, using a pulse density modulation scheme by means of tunneling and injection mechanisms. The LMS algorithm is implemented digitally off chip, and it does not require the signal to be piecewise stationary, and requires no manual operation other than selection of the step-size.

Adstruct-At present, Cellular Neural Networks (C")in VLSI technology are powerful parallel structures with real-time image processing capabilities. In this context it is necessary to work on a simplified CNN idea from the hardware point of view (derived from the original CNN model proposed by Chua et uL) in order to design a more feasible CNN IC with lower complexity circuits. In this work, taking into account that many binary image tasks present a linearly separable feature, the original output function can be replaced by a step function. Analog multipliers can be substituted by simple analog multiplexers and we take advantage that all the signals can be unipolar. These features reduce the complexity of the circuits but presewing the computation in selected binary-image processing tasks. The circuits in our CMOS integrated circuit belong to the class of those in the design of mixed-signal systems with current-mode representation of signal-flow. The technology for these circuits is based an the n-well, 1.2-micron CMOS process offered by MOSlS to research groups in universities.