A major challenge of software-defined radio (SDR) is to realize many giga operations per second of flexible baseband processing within a power budget of only a few hundred mW. A heterogeneous hardware architecture with the programmable vector processor EVP as key component can support WLAN, UMTS, and other standards. A detailed rationale for the EVP architecture, based on the analysis of a number of key algorithms, as well as implementation and benchmarking results are described.

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In general, traiisform aiicl snbband coders are designed so as to achieve perfect. reconst,ruction in the icky1 case. Nevert,heless. in a real system t,here are many clist,urbing effeck such as qnantization in digit,al filt,crs, intermediate coding st,ages, ancl noisy transinisslon channels which prevent. perfect, reconstmction. Usually, t,hese effert,s are &her iieglect8ed or modelled in a very simple ay. In contmst,, we present a new software tool which permits an aut.omatic symbolic analysis of irnplemented filter banks using refined models of wordlengt81i effec-t,s. FnrQhermore, we will validate the symbolic oiit,comes by measurement, results.IO. Rak J.R., A jS,bsiein For Trtrmjbriii J/>c:lur Coding o/' htrges, Third Irileriiatioirial Coifereiice on Sigiiiil Processiiig ICSP'96.