The use of Kohonen self-organizing feature maps in real time applications requires high computational performance, especially for embedded systems and hence neural network chips are essential. A digital architecture of Kohonen neural network with learning capability and on-chip adaptation and storage is proposed with the implementation of Kohonen Self-Organizing Map (SOM) neural networks on the low-cost Spartan-3 FPGAs. The architecture of th i s di gi tal ch i p b ased on th e i dea th at som e assum pti on s f or th e restri cti on s of th e algorithm can simplify the implementation. Using the Manhattan distance, a special treatment of the adaptation factor, and neighborhood functions will decrease the necessary chip area so that a high number of processing elements can be integrated on one chip.
This paper investigates the effect of quantization gain factors, at the input side, and the scaling gain, at the output side, of a fuzzy controller. A fuzzy control system is designed with two main parts: a basic fuzzy controller (BFC) which produces the output control signal and supervisor fuzzy controllers (SFCs) to continuously adjust, on-line, the I/O scaling or gain factors of the (BFC) in order to improve its performance against different dynamic operating conditions. The designed self tuning controller is used to position control of a DC motor with un known parameters according to the feed back inputs, a tracking error (e) and change of error (e), based on the proposed fuzzy rules. The system implementation and tests are carried out using LabVIEW software (V8.2) with a data acquisition card type (NI PCI-6251) from National Semiconductors to achieve real time measurements.
One of the main effective means for communication is the picture. Computer graphic is an exiting growing field for visual communication. Nowadays computer graphic finds roots in diverse areas of application such as education, research, medicine, training, business, advertisement, and entertainment. Some of the most sophisticated computer graphics systems are those being used for producing video images in real time. This requires downloading repeatable tasks on the hardware [1][2].
Bit-mapped images are prone to the jaggies (stair-step effect along edges) because the computer uses small dots to build images. This effect is called aliasing and the technique used to reduce it is called antialiasing. This paper investigates aliasing along straight line segments or edges, its origin, and how it is affected by the orientation or slope of the segment. A method for antialiasing or smoothing the straight line segments by modifying the intensity of the pixels is presented. Hardware implementation of this method is finally formulated and tested using Field Programmable Gate Arrays (FPGA).
The computer graphics system performance is increasing faster than any other computing application. The Geometric transformations and animation are one of the most important principle of the interactive computer graphics which are essential for modeling and viewing. This paper tends to construct a general form of matrix representation of the geometric transformations and implement it using Field Programmable Gate Array (FPGA). In addition to that the sine and cosine function evaluation is done using two techniques, the lookup table method and CORDIC algorithm.
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