No abstract

Threshold voltage drift under gate bias stress was investigated in gate-recessed enhancement mode (E-mode) GaN MOSFET and depletion mode (D-mode) GaN MOS high-electron-mobility transistor (MOSHEMT) with Al2O3 gate dielectric layer. Besides the positive shift of threshold voltage in both devices under positive gate stress, it is also found that positive shift could also exist in E-mode GaN MOSFET under negative gate bias stress, while negative shift is observed in D-mode MOSHEMT. A three-step trapping and detrapping process was observed in the drain current transient of the device after negative gate bias stress. It was suggested that gate electron injection and the following trapping in the “damaged” gate recessed GaN channel layer is the dominant mechanism for the positive shift of the threshold voltage under negative gate bias in the enhancement mode GaN MOSFET.

The time-dependent threshold voltage drift induced by fast interface traps in a fully gate-recessed normally-off GaN MOSFET is studied. It is found that the degree and time scale of the shift in threshold voltage are consistent with the density and time constant of interface traps at the MOS interface. The device based on wet etching delivers higher interface quality and threshold voltage stability than that based on dry etching. Nitrogen deficiency and high oxygen coverage are considered to be the origins of the high interface trap density in the MOSFET fabricated by dry etching.