This paper showcases a low-power demodulator for medical implant communication services (MICS) applications. Complementary shunt resistive feedback, current reuse configuration, and sub-threshold LO driving techniques are proposed to achieve ultra-low power consumption. The chip has been implemented in standard CMOS process and consumes only 260-[Formula: see text]W.

SummaryThis paper presents a front‐end receiver with a dual cross‐couple technique for Medical Implant Communication ServicesM applications, using a standard complementary metal‐oxide semiconductor process. A lower‐power design is achieved using a resistive feedback, gm‐boosting technique along with a current reuse topology in the receiver's transconductance stage. In addition, a dual cross‐coupling configuration applied at the input stage increases overall gain performance and reduces power consumption. The measured power dissipation of the low‐noise amplifier is only 0.51 mW. The conversion gain of the receiver is 19.74 dB, while the radio frequency and local oscillator frequencies are respectively 403.5 and 393.5 MHz, and the LO power is 0 dBm. The chip exhibits excellent isolation below −70 dB from LO to intermediate frequency and LO to radio frequency. Copyright © 2016 John Wiley & Sons, Ltd.