This study presents a hybrid algorithm obtained by combining a genetic algorithm (GA) with successive quadratic sequential programming (SQP), namely GA-SQP. GA is the main optimizer, whereas SQP is used to refine the results of GA, further improving the solution quality. The problem formulation is done in the framework named RUNE (fRamework for aUtomated aNalog dEsign), which targets solving nonlinear mono-objective and multi-objective optimization problems for analog circuits design. Two circuits are presented: a transimpedance amplifier (TIA) and an optical driver (Driver), which are both part of an Optical Network-on-Chip (ONoC). Furthermore, convergence characteristics and robustness of the proposed method have been explored through comparison with results obtained with SQP algorithm. The outcome is very encouraging and suggests that the hybrid proposed method is very efficient in solving analog design problems

The tracker system will have a major overhaul. Its components will be replaced with new technologies in order to cope with the increased hit occupancy and radiation environment. Here we describe a detector made of scintillating fibers read out by silicon photomultipliers (SiPM), with a view to its application for this upgrade. This technology has been shown to achieve high efficiency and spatial resolution, but its integration within a LHCb experiment presents new challenges.This article gives an overview of the R&D status of the low-Power ASIC for the sCIntillating FIbres traCker (PACIFIC) chip implemented in a 130 nm CMOS technology. The PACIFIC chip is a 64-channel ASIC which can be connected to a SiPM without the need of any external component. It includes analog signal processing and digitization. The first stage is a current conveyor followed by a tunable fast shaper (≈ 10 ns) and a gated integrator. The digitization is performed using a 3 threshold non-linear flash ADC operating at 40 MHz. The PACIFIC chip has the ability to cope with different SiPM suppliers with a power consumption below 8 mW per channel and it is radiation-tolerant. Lastly, simulation and test results show the proper read out of the SiPMs with the PACIFIC chip.

We present an optimization of the voltage scaling algorithm in low power audio class G amplifier for headphones application to allow longer playback time. The optimization approach minimizes the voltage difference between the internal audio amplifier power supply and its output signal over a large range of operating conditions. The modeling is based on a behavioral model enabling accurate and rapid evaluation of efficiency and audio quality with realistic input stimuli. The model validated in practice is used to optimize the voltage scaling using only few power supply levels. Thanks to a global search algorithm followed by a local one, the optimization gives the better parameters for voltage scaling algorithm while keeping a good audio quality. The proposed configuration increases the efficiency up to 48% at nominal operation.

This paper presents a system-level method to decrease the power consumption of integrated audio Class-G amplifiers for mobile phones by using the same implementation of the level detector, but by changing the parameters of the switching algorithm. This method uses an optimization based on a simplified model simulation to quickly find the best power supply switching strategy in order to decrease the losses of the internal Class-AB amplifier. Using a few relevant equations of Class-G on the electrical level and by reducing the number of calculation points, this model can dramatically reduce the calculation time to allow power consumption evaluation in realistic case conditions compared to the currently available tools. This simplified model also evaluates the audio quality reproduction thanks to a psycho-acoustic method. The model has been validated by comparing model results and practical measurements on two industrial circuits. This proposed model is used by an optimizer based on a genetic algorithm associated with a pattern search algorithm to find the best power supply switching strategy for the internal Class-AB amplifier. The optimization results improve life-time performance by saving at least 25% in power consumption for typical use-case (1mW) compared to the industrial circuit studied and without losses in audio quality