We proposed and tested a low power SRAM using charge transfer (CT) pre-sense amplifier and a bus signal encoding scheme. The CT amplifier compensates the Vth mismatch between the pair MOS transistors, and the encoded bus signal reduces the number of wires being switched. They are dynamically controlled by a low power DLL we proposed. The fabricated SRAM worked at 5OMHz with the power dissipation of 5mW at 1V power supply.
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