Piecewise polynomial interpolation is a well-established technique for hardware function evaluation. The paper describes a novel technique to minimize polynomial coefficients wordlength with the aim of obtaining either exact or faithful rounding at a reduced hardware cost. The standard approaches employed in literature subdivide the design of piecewise-polynomial interpolators into three steps (coefficients calculation, coefficients quantization and arithmetic hardware optimization) and estimate conservatively the overall approximation error as the sum of the error components arising in each step. The proposed technique, using Integer Linear Programming (ILP), optimizes the polynomial coefficients taking into account all error components simultaneously. This gives two advantages. Firstly, we can obtain exactly rounded approximations; secondly, for faithfully rounded interpolators, we avoid any overdesign due to pessimistic assumptions on error components, optimizing in this way the resulting hardware. The proposed ILP based algorithm requires an acceptable CPU time (from few seconds to tens of minutes) and is suited for approximations up to, maximum, 24 input bits. The results compare favorably with previously published data. We present synthesis results in 28 nm and 90 nm CMOS technologies, to further assess the effectiveness of the proposed approach

Data obtained during five months of 2001 with the gravitational wave (GW) detectors EXPLORER and NAUTILUS were studied in correlation with the gamma ray burst data (GRB) obtained with the BeppoSAX satellite. During this period BeppoSAX was the only GRB satellite in operation, while EXPLORER and NAUTILUS were the only GW detectors in operation. No correlation between the GW data and the GRB bursts was found. The analysis, performed over 47 GRB's, excludes the presence of signals of amplitude h ≥ 1.2 × 10 −18 , with 95% probability, if we allow a time delay between GW bursts and GRB within ±400 s, and h ≥ 6.5 × 10 −19 , if the time delay is within ±5 s. The result is also provided in form of scaled likelihood for unbiased interpretation and easier use for further analysis.

No abstract

Antenna-coupling group delay limits the cancellation bandwidth of conventional self-interference cancellers (SICs), making it difficult to ensure isolation in both transmit (TX) and receive (RX) bands. Isolation over both bands is achieved in the dual-path receiver architecture proposed in this paper. The main path consists of a highly linear current-mode RX with a passive RF SIC. The auxiliary path implements a notch in the TX band followed by an adaptive digital equalizer whose output is used to suppress the TX noise leakage in the RX band. The main and auxiliary receiver prototypes, implemented in 28-nm CMOS technology, operate between 1 and 2 GHz, occupy an area of 0.51 and 0.12 mm 2 , and have a power dissipation of 32-40 and 26-64 mW, respectively. The stand-alone RX has a noise figure (NF) of 4-5 dB and an out-of-band IIP3 of 18 dBm. Turning on the passive canceller results in an effective IIP3 of 25-29 dBm and a degradation of the NF of less than 0.8 dB. Thanks to its high dynamic range, the auxiliary path suppresses the TX noise by >29 dB while degrading the RX NF by only 1 dB at 23-dBm TX output power.

No abstract