In VLSI design power dissipation is an important factor in micro and nano VLSI design. For Space applications, Circuits with Ultralow power (ULP) operation is a good solution because of its limited options of energy sources. This Ultralow power operation will pay the way to small and low-cost satellites where the heavy battery and power supplies can be replaced. One of the effective way to implement ULP operations are by restricting the VDD and make the circuit to work in sub threshold region. But at the same time this low voltage circuits have some challenges like delay, temperature fluctuations needs to be addressed. The most complicated area of these circuits are memory arrays which cover large areas of the silicon die which often store critical data. Large bit cells leads to hardening of embedded memory block cells and this limits the low power operation of the entire system. In this paper, radiation-hardened static random access memory (SRAM) bit cell targeted at low-voltage functionality is proposed. The proposed method employs 5T RAM cell bears changes in charge deposits as high as 500 fC at a scaled 500-mV supply voltage.