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The parasitic capacitance in the dynamic node increases for wide tag comparator increasing the delay and power consumption. The output signal may also degrade with high performance computing that uses clock frequency over 1GHz. In this paper a circuit is proposed to reduce the delay of the evaluation phase of the 64 bit tag comparator by reducing the parasitic capacitance at the dynamic node. The circuit is applicable for wide fan-in gates. The performance has enhanced by 60-70% with reduced leakage providing reduced voltage degradation of the output signal when compared to the rest of the dynamic circuit under study. The Mentor Graphics tool kit is used to perform pre-layout simulations, circuit layout generation and physical verification of the layout.

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Expansive soils causes alternate swelling and shrinkage with the change in water content. The experimental studies from heave test conducted with installing lime mixed GGBS columns in the clay bed formed in a laboratory test tank. This technique improves swelling problem as well as low shear strength of soil. Various lime-GGBS combinations are used with different spacing and patterns of column to get an optimum combination of lime GGBS proportion, spacing and pattern of the columns. Strength tests were also conducted with three combinations of GGBS and lime. Effect of one column on the surrounding soil mass was noticed by taking UCC samples from different locations from the column in a test tank. Also effect of curing on strength improvement was also studied. The result from the test shows that the method can be effectively used for reducing heaving problem hence to provide additional strength in an economical manner compared to other methods.

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