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In recent years, wireless communication systems have experienced an enormous development, leading to the emergence of various wireless networks standards. These standards are characterized by different properties, such as their coverage, data rates, mobility and QoS support. Among them the HiperLan/2 standard is distinguished of its performance, supporting the provision of high-speed integrated services. Its centralized Medium Access Control protocol though is the most critical and complex functional entity, enabling the management of the air-interface in real time and the efficient allocation of the bandwidth resources to the users. In this paper we will present the architecture and implementation of the HiperLan/2 MAC protocol, placing special emphasis on its timing requirements that define the hardware/software partitioning scheme of the developed system. The proposed architecture relieves the network upper layers of processing time critical events, enforcing the emergence of HiperLan/2 commercial products.

In recent years, wireless access networks offer an alternative method for connecting subscribers to the global communication network. Several high-speed Wireless LAN's (WLAN) standards have emerged and among them the ETSI BRAN HiperLAN II standard is distinguished for its performance and QoS support.This paper, starting with a short overview of HiperLAN II main features and Medium Access (MAC) protocol, presents the architecture of an implemented high-speed Frame Processor that realizes the medium access control (MAC) protocol of the HiperLAN II standard. The main goal of the Frame Processor is the real-time management of the air interface as well as to bridge the upper network layers with the wireless world, relieving the data link control (DLC) layer of time-consuming tasks such as slot map allocation extraction, bit-by-bit processing of data units, framing and synchronization.

In this paper we will present, the implementation of a hardware component that is being used for the calculation of the disparity field of two stereoscopic video signals. This component is a major part of an extensive 3D videoconferencing system, that was implemented under the European ACTS! PANORAMA project*. Incorporating with a headtracker and an interpolator a combination of the intermediate views, can be achieved so as the viewer will have a motion parallax perception [1].