A bst r actThis paper presents a VLSI implementation of the Priority Adaptive Self-organizing Concurrent System (PASOCS) learning model that is built using a multichip module (MCM) substrate. Many current hardware implementations of neural network learning models are direct implementations of classical neural network structures-a large number of sample computing nodes connected by a dense number of weighted links. PASOCS is one of a class of ASOCS (Adaptive SelfOrganizing Concurrent System) connectionist models whose overall goal is the same as classical neural networks models, but whose functional mechanisms differ significantly. This model has potential application in areas such as pattern recognition, ro botics, logical inference, and dynamic control.

In the process of selecting a machine learning algorithm to solve a problem, questions like the following commonly arise: (1) Are some algorithms basically the same, or are they fundamentally different? (2) How different? (3) How do we measure that difference? (4) If we want to combine algorithms, what algorithms and combinators should be tried? This research proposes COD (Classifier Output Difference) distance as a diversity metric. COD separates difference from accuracy, COD goes beyond accuracy to consider differences in output behavior as the basis for comparison. The paper extends earlier on COD by giving a basic comparison to other diversity metrics, and by giving an example of using COD data as a predictive model from which to select algorithms to include in an ensemble. COD may fill a niche in metalearning as a predictive aid to selecting algorithms for ensembles and hybrid systems by providing a simple, straightforward, computationally reasonable alternative to other approaches.

The requirement for dense interconnect in artificial neural network systems has led researchers to seek high-density interconnect technologies. This paper reports an implementation using multi-chip modules (MCMs) as the interconnect medium. The specific system described is a self-organizing, parallel, and dynamic learning model which requires a dense interconnect technology for effective implementation; this requirement is fulfilled by exploiting MCM technology. The ideas presented in this paper regarding an MCM implementation of artificial neural networks are versatile and can be adapted to apply to other neural network and connectionist models.

Reinforcement Programming (RP) is a new technique for automatically generating a computer program using reinforcement learning methods. This paper describes how RP learned to generate code for three binary addition problems: simulate a full adder circuit, increment a binary number, and add two binary numbers. Each problem is presented as an extension of the one previous to it, which provides an introduction to the practical application of RP. Each solution uses a dynamic, episodic form of delayed Q-Learning algorithm. "Dynamic" means that grows the policy during learning, and prunes it before the policy is translated to source code. This is different from Q-Learning models that use fixed-size tables or neural net function approximators to store q-values associated with (state,action) pairs. The states, actions, rewards, other parameters, and results of experiments are presented for each of the three problems.

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