We present a uni ed approach for exploiting thread-level, data-level, and memory-level parallelism through a same-ISA dynamic binary modi er guided by static binary analysis. A static binary analyser rst examines an executable and determines the operations required to extract parallelism at runtime, encoding them as a series of rewrite rules that a dynamic binary modi er uses to perform binary transformation. We demonstrate this framework by exploiting three di erent kinds of parallelism to perform automatic vectorisation, software prefetching, and automatic parallelisation together on legacy application binaries. Software prefetch insertion alone achieves an average speedup of 1.2×, comparing favourably with an automatic compiler pass. Automatic vectorisation brings speedups of 2.7× on the TSVC benchmarks, signi cantly beating a compiler approach for some workloads. Finally, combining prefetching, vectorisation, and parallelisation realises a speedup of 3.8× on a representative application loop.