We present the electrical and radiation characterisation of the most recent prototype of the bPOL12V DCDC converter, a stacked assembly of two ASICs inside a QFN32 package. The use of a reference voltage generator chip in 130nm CMOS on top of the ASIC integrating the control system and power train enables improved radiation tolerance and the trimming of the output voltage during the production phase. Prototype samples have been exposed to X-rays, proton and neutron irradiations, as well as subject to long-term electrical stress to evaluate their reliability in the application. The results confirm that only a few minor modifications are required to achieve production readiness.

A test chip with 368 ring-oscillators and 4 different SRAMs has been designed to study the effect of total ionizing dose on a commercial 28 nm CMOS technology. The chip has been exposed to 1 Grad(SiO2), followed by a week of annealing at T = 100 °C. The results will be compared to those obtained on single (i.e., isolated) devices in the same 28 nm process and on a similar chip in 65 nm CMOS technology. This test confirms the robustness of the 28 nm technology to ionizing radiation, enabling the development of ASICs capable of surviving in environments with hundreds of Mrad.

A prototype second-stage buck DC-DC converter has been designed in 130 nm CMOS and fully characterized. This circuit provides up to 3 A at an adjustable output voltage of 0.6-1.5 V from an intermediate bus voltage of 2.5 V. Hardening-by-design techniques have been systematically used, and the prototype successfully passed TID irradiation up to 200 Mrad (SiO2) and Single Event Effects tests with a heavy ion beam. Safe integration on-board requires an optimized PCB design and bump-bonding assembly to reduce parasitic inductances along the input current path.

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