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Wireless communication is the most effective communication to convey audio or video information among the population. It enables the masses to connect throughout the world. Wireless technologies improve the lifestyle of individuals in rural and poor communication areas. In this view, the quality of a reliable signal can be enhanced by minimizing carrier interference. In this paper bit error rate of an image, signal is transmitted over fading channel is analyzed using orthogonal frequency multiplexing and channel estimation technique. An Orthogonal Frequency Multiplexing (OFDM) provides prominent bandwidth effectiveness and improved immunity to the fading environments. In OFDM, the data is modulated using multiple numbers of subcarriers that are orthogonal to each other. A cyclic prefix is infixed between OFDM symbols to annihilate the inter symbol interference (ISI) and inter-carrier interference (ICI). The least square channel estimation method is used to minimize the effect of multipath fading. An image, signal is modulated using BPSK, QPSK, 16QAM and 64QAM digital modulation schemes with OFDM and channel estimation and transmitted over AWGN and fading channel. The objective of this work is to improve the signal to noise ratio by reducing interference. The bit error rate vs. signal to noise ratio for BPSK, QPSK, 16QAM and 64QAM without channel estimation at 5dB is 0.4948, 0.4987, 0.4965 and 0.4983 and with channel estimation is 0.099, 0.2600, 0.3900 and 0.4300 respectively. The bit error rate obtained with BPSK, QPSK, 16QAM and 64QAM without channel estimation at SNR of 10dB is 0.4964, 0.4985, 0.4957 and 0.4982 and with channel estimation is 0.033, 0.19, 0.34 and 0.38 respectively. The bit error rate obtained with BPSK, QPSK, 16QAM and 64QAM without channel estimation at SNR of 15dB is 0.4938, 0.4985, 0.4953 and 0.4979 and with channel estimation is 0.0072, 0.1900, 0.3241 and 0.3762 respectively. The error rate is minimized with channel estimation. The error rate increases with the order of modulation and it is noticed that the error rate is minimum with the BPSK modulator and is maximum with 64QAM.

Background/Objectives: Low power modulators are most efficient for wireless communication. Quadrature Amplitude Modulation (QAM) is used widely for high data rate communication than BPSK and QPSK, since it carries more bits of information per symbol over the channel. The objective of this work is to minimize the power consumption and area utilization of 32-bit QAM modulator. Methods/Statistical analysis: In this work, three new procedures are introduced for 32QAM modulator. In the first approach, sine and cosine data generated using conventional technique are stored in ROM and the stored data is selected based on the input sequence to generate the output signal. This approach reduces the power consumption and area utilization. In the second approach, information bit stream is modulated with sine and cosine waves generated by iterative algorithm to minimize power and area requirement. In the third approach, booth multiplication algorithm is employed to generate QAM signal. This method of generating QAM signal consumes less power and area in comparison with the conventional modulator. The work is synthesized, analyzed, and compared in 180nm, 90nm and 45nm CMOS technology using Cadence software. Findings: In 180nm CMOS technology power consumption noticed is 60662.740nW, 617020.071nW and 133679.687nW with the proposed method1, method2 and method3 respectively. An Area utilized in 180nm CMOS technology is 1341µm2, 20746.757µm2, and 2754µm2 respectively in proposed 32QAM modulator with ROM, 32QAM modulator with proposed Iterative algorithm and 32QAM modulator with Booth multiplication algorithm. Novelty/Applications: The conventional 32QAM devours additional power and area. In this work area and power reduction is achieved with respect to the conventional method. The same work is carried out with 90nm and 45nm CMOS technology. Three novel approaches to 32QAM are proposed. The proposed work is synthesized, analyzed, tabulated and compared with conventional method and shown that power consumption and area utilization are minimum than compared to the conventional method.

Due to the increasing development of cities’ populations, which has resulted in massive garbage output, waste management systems in urban areas are confronting issues. The ravage of possessions can be employed powerfully with the incorporation of the internet of things (IoT), TensorFlow based deep learning model, as conventional ravage managing system are extremely uneconomical. The major goal of this study is to create a smart waste management system based on a deep learning model that optimizes trash isolation and allows for bin status monitoring in an IoT context. Yolo real time object detection algorithm is employed and educated with a dataset that includes paper, cardboard, glass, metal, and plastic for garbage sorting and grouping. Yolo algorithm enhances the detection speed and yields precise findings with low background noise. Yolo uses convolutional neural network to detect the object. The camera module detects garbage and the servomotor linked to a plastic board, categorizes the waste into the appropriate waste cubicle using the educated model on TensorFlow Lite and Raspberry Pi 4. The garbage fill is monitored by an ultrasonic sensor, and the latitude and longitude are obtained in real time by a GPS module. The smart bin’s LoRa module transmits the bin’s status to the LoRa receiver at 915 MHz. The smart bin’s electronic mechanisms are safeguarded by an RFID-based locker that can only be opened with a registered RFID badge for maintenance or upgrades. This work is framed out of the technologies such as Robotics, neural network, Internet of Things and deep learning algorithm. The garbage detection system is more precise and faster than the other existing methods. The YOLO algorithm can predict objects in real time, which speeds up detection. It’s a prediction method that produces exact results with little background noise. The algorithm has outstanding learning capabilities, allowing it to learn and apply object representations to object detection.

Low power modulators are most efficient for wireless communication. The conventional BPSK modulator consumes more power and area. In this work, the new approaches for BPSK modulator are discussed and recorded. The four new approaches consume less area and power than the conventional design of BPSK Modulator. The power and area consumed by new approaches are compared with the conventional method. Cadence software is used for the simulation and synthesis, the power and area reduction in 180nm, 90nm and 45nm CMOS Technology is reported, MATLAB/SIMULINK is used to do BER analysis of BPSK modulator with AWGN channel. The new architectures enhance the performance of BPSK Modulator in consuming less power and utilizing less area than the conventional design.