Here, we report the fabrication of nanoscale (15 nm) fully transparent p-type SnO thin film transistors (TFT) at temperatures as low as 180 °C with record device performance. Specifically, by carefully controlling the process conditions, we have developed SnO thin films with a Hall mobility of 18.71 cm(2) V(-1) s(-1) and fabricated TFT devices with a linear field-effect mobility of 6.75 cm(2) V(-1) s(-1) and 5.87 cm(2) V(-1) s(-1) on transparent rigid and translucent flexible substrates, respectively. These values of mobility are the highest reported to date for any p-type oxide processed at this low temperature. We further demonstrate that this high mobility is realized by careful phase engineering. Specifically, we show that phase-pure SnO is not necessarily the highest mobility phase; instead, well-controlled amounts of residual metallic tin are shown to substantially increase the hole mobility. A detailed phase stability map for physical vapor deposition of nanoscale SnO is constructed for the first time for this p-type oxide.

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In this report, both p- and n-type tin oxide thin-film transistors (TFTs) were simultaneously achieved using single-step deposition of the tin oxide channel layer. The tuning of charge carrier polarity in the tin oxide channel is achieved by selectively depositing a copper oxide capping layer on top of tin oxide, which serves as an oxygen source, providing additional oxygen to form an n-type tin dioxide phase. The oxidation process can be realized by annealing at temperature as low as 190°C in air, which is significantly lower than the temperature generally required to form tin dioxide. Based on this approach, CMOS inverters based entirely on tin oxide TFTs were fabricated. Our method provides a solution to lower the process temperature for tin dioxide phase, which facilitates the application of this transparent oxide semiconductor in emerging electronic devices field.

P-type Cu2O/SnO bilayer thin film transistors (TFTs) with tunable performance were fabricated using room temperature sputtered copper and tin oxides. Using Cu2O film as capping layer on top of a SnO film to control its stoichiometry, we have optimized the performance of the resulting bilayer transistor. A transistor with 10 nm/15 nm Cu2O to SnO thickness ratio (25 nm total thickness) showed the best performance using a maximum process temperature of 170 °C. The bilayer transistor exhibited p-type behavior with field-effect mobility, on-to-off current ratio, and threshold voltage of 0.66 cm(2) V(-1) s(-1), 1.5×10(2), and -5.2 V, respectively. The advantages of the bilayer structure relative to single layer transistor are discussed.

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