Abstract-This paper describes the design of pipeline ADC embedded in a high speed CMOS sensor that has been designed and fabricated by Paindavoine. The idea of ADC to be embedded in the high speed cmos sensor in order to reduce power, integrated so that the output of the CMOS sensor is already in digital form. An ADC is designed using Pipeline topology with considerations is simple in the design because it just makes a stage and the next stage is duplicated, relatively high speed and have good resolution. Pipeline ADC designed using 0.35 µm CMOS technology. Pipeline ADC successfully implemented in a electronics circuit and layout. It has been fabricated. The results of simulations show that the design of pipeline ADC is working properly and can be used to handle a high speed CMOS sensor that has speed of 10 000 frames/s.
scite is a Brooklyn-based organization that helps researchers better discover and understand research articles through Smart Citations–citations that display the context of the citation and describe whether the article provides supporting or contrasting evidence. scite is used by students and researchers from around the world and is funded in part by the National Science Foundation and the National Institute on Drug Abuse of the National Institutes of Health.
customersupport@researchsolutions.com
10624 S. Eastern Ave., Ste. A-614
Henderson, NV 89052, USA
This site is protected by reCAPTCHA and the Google Privacy Policy and Terms of Service apply.
Copyright © 2024 scite LLC. All rights reserved.
Made with 💙 for researchers
Part of the Research Solutions Family.