This paper demonstrates the design of the 8 channel and 16 channel biomedical data selector with passtransistor switches. Pass transistor switches are designed with NMOS switch logic in 45nm technology. Data selectors are the important input circuitry to instrumentation amplifier in the Electrocardiogram (ECG). Generally, Inputs for ECG are very low voltages in terms of millivolts and frequency also in HZs. The proposed designs are useful in 3 lead 6 lead and 12 lead ECGs. The power dissipation is 11.055 pW at 1HZ and its calculated for supply voltages of 0.5 V and frequency analysis are done in between 1HZ to 10 KHZ.

Fault diagnosis in processing digital system application has raised various limiting problems. While basic objective of fault tolerant systems is to minimize the fault occurring in the device, the processing error is an additional error to be considered. Past approaches were observed to be focusing much on internal fault in digital device, the error due to processing and communication is to be developed. In this paper a self correcting approach to memory design based on memory interface is proposed. The error approach observed in case of forwarding binary data to encode, store and retrieve with error free coding is proposed. The Process of memory error free coding results in higher reliability in case of bit and block coding.

As with the increase in data density the probability of error happening in data transfer has increased the need for error free coding technique is in greater demand. In this paper an optimal approach for the processing of self correcting logic in faulty condition during coding and decoding operation is developed. The process of digital designing and its evaluation for realization is presented. The implementation of proposed design on Xilinx-FPGA device is presented.