Compressed sensing (CS) is a technique that is suitable for compressing and recovering signals having sparse representations in certain bases. CS has been widely used to optimize the measurement process of bandwidth and power constrained systems like wireless body sensor network. The central issues with CS are the construction of measurement matrix and the development of recovery algorithm. In this paper, we propose a simple deterministic measurement matrix that facilitates the hardware implementation. To control the sparsity level of the signals, we apply a thresholding approach in the discrete cosine transform domain. We propose a fast and simple recovery algorithm that performs the proposed thresholding approach. We validate the proposed method by compressing and recovering electrocardiogram and electromyogram signals. We implement the proposed measurement matrix in a MSP-EXP430G2 LaunchPad development board. The simulation and experimental results show that the proposed measurement matrix has a better performance in terms of reconstruction quality compared with random matrices. Depending on the compression ratio, it improves the signal-to-noise ratio of the reconstructed signals from 6 to 20 dB. The obtained results also confirm that the proposed recovery algorithm is, respectively, 23 and 12 times faster than the orthogonal matching pursuit (OMP) and stagewise OMP algorithms.Index Terms-Compressed sensing (CS), deterministic measurement matrix, electrocardiogram (ECG), electromyogram (EMG), recovery algorithm.

International audienceIn this paper, we present a novel architecture based on field-programmable gate arrays (FPGAs) for the reconstruction of compressively sensed signal using the orthogonal matching pursuit (OMP) algorithm. We have analyzed the computational complexities and data dependence between different stages of OMP algorithm to design its architecture that provides higher throughput with less area consumption. Since the solution of least square problem involves a large part of the overall computation time, we have suggested a parallel low-complexity architecture for the solution of the linear system. We have further modeled the proposed design using Simulink and carried out the implementation on FPGA using Xilinx system generator tool. We have presented here a methodology to optimize both area and execution time in Simulink environment. The execution time of the proposed design is reduced by maximizing parallelism by appropriate level of unfolding, while the FPGA resources are reduced by sharing the hardware for matrix-vector multiplication across the data-dependent sections of the algorithm. The hardware implementation on the Virtex6 FPGA provides significantly superior performance in terms of resource utilization measured in the number of occupied slices, and maximum usable frequency compared with the existing implementations. Compared with the existing similar design, the proposed structure involves 328 more DSP48s, but it involves 25 802 less slices and 1.85 times less computation time for signal reconstruction with N = 1024, K = 256, and m = 36, where N is the number of samples, K is the size of the measurement vector, and m is the sparsity. It also provides a higher peak signal-to-noise ratio value of 38.9 dB with a reconstruction time of 0.34 mu s, which is twice faster than the existing design. In addition, we have presented a performance metric to implement the OMP algorithm in resource constrained FPGA for the better quality of signal reconstruction

International audienceCompressed sensing (CS) is an emerging signal processing technique that enables sub-Nyquist measurement of signals having sparse representations in certain bases. Since most physiological signals treated within a wireless body area network (WBAN) are sparse, CS can be applied to WBANs to reduce the number of measurements and minimize the energy consumption of the sensor nodes. In this paper, we propose a simple and efficient CS encoder device used to measure signals within sensor nodes of a WBAN. A digital and an analog models of the proposed CS encoder are presented. As the CS encoder and decoder are tightly coupled, a model of the overall acquisition chain is required in the first stages of development and validation. To do this, we propose a virtual prototyping of the system with SystemC-AMS. A SPICE model and a hardware prototype of the proposed CS encoder are also presented. The simulation results of both models show that the proposed encoder was able to compressively measure an electrocardiogram (ECG) and an electroencephalogram signals with compression ratios of 6: 1 and 4: 1, respectively, which save 82.9% and 75% of the energy consumption of transceivers. The experiment results were consistent with those of the model and show that the hardware prototype was able to compressively measure an ECG signal with a compression ratio of 8: 1. Comparison with a random demodulator (RD) was carried out and shows that the proposed encoder outperformed RD in terms of compression ratio and reconstruction quality