Preemptions via virtual channels have been proposed as a means to introduce the notion of priorities and real-time concepts in wormhole-switched NoC-based architectures. This work presents a holistic approach, which utilises a novel three-staged mapping method in order to assess what should be the physical characteristics of the platform (and its interconnect), such that real-time guarantees can be provided, assuming a given workload. We estimate the "gap" between platform characteristics required for the real-time analysis and those of currently available many-core platforms and propose to employ the existing feature of many-core platforms in order to significantly reduce this gap. The experiments demonstrate that virtual channels, an essential prerequisite for the real-time analysis, are not the bottleneck. The approach presented in this paper can help system designers to select/design the most suitable platform for a given workload, such that all temporal constraints are met and over-dimensioning is avoided.

Many embedded multi-core systems incorporate both dataflow applications with timing constraints and traditional real-time applications. Applying real-time scheduling techniques on such systems provides real-time guarantees that all running applications will execute safely without violating their deadlines. However, to apply traditional realtime scheduling techniques on such mixed systems, a unified model to represent both types of applications running on the system is required. Several earlier works have addressed this problem and solutions have been proposed that address acyclic graphs, implicit-deadline models or are able to extract timing parameters considering specific scheduling algorithms.In this paper, we present an algorithm for extracting real-time parameters (offsets, deadlines and periods) that are independent of the schedulability analysis, other applications running in the system, and the specific platform. The proposed algorithm: 1) enables applying traditional real-time schedulers and analysis techniques on cyclic or acyclic Homogeneous Synchronous Dataflow (HSDF) applications with periodic sources, 2) captures overlapping iterations, which is a main characteristic of the execution of dataflow applications, 3) provides a method to assign offsets and individual deadlines for HSDF actors, and 4) is compatible with widely used deadline assignment techniques, such as NORM and PURE. The paper proves the correctness of the proposed algorithm through formal proofs and examples. Abstract-Many embedded multi-core systems incorporate both dataflow applications with timing constraints and traditional real-time applications. Applying real-time scheduling techniques on such systems provides real-time guarantees that all running applications will execute safely without violating their deadlines. However, to apply traditional real-time scheduling techniques on such mixed systems, a unified model to represent both types of applications running on the system is required. Several earlier works have addressed this problem and solutions have been proposed that address acyclic graphs, implicit-deadline models or are able to extract timing parameters considering specific scheduling algorithms.In this paper, we present an algorithm for extracting real-time parameters (offsets, deadlines and periods) that are independent of the schedulability analysis, other applications running in the system, and the specific platform. The proposed algorithm: 1) enables applying traditional real-time schedulers and analysis techniques on cyclic or acyclic Homogeneous Synchronous Dataflow (HSDF) applications with periodic sources, 2) captures overlapping iterations, which is a main characteristic of the execution of dataflow applications, 3) provides a method to assign offsets and individual deadlines for HSDF actors, and 4) is compatible with widely used deadline assignment techniques, such as NORM and PURE. The paper proves the correctness of the proposed algorithm through formal proofs and examples.

This paper presents an experimental study into the comparative response of wiper and round-nose conventional carbide inserts coated with TiCN + AL2O3 + TiN when turning an AISI 4340 steel alloy. The optimal process parameters, as identified by pre-experiments, were used for both types of inserts to determine the machined surface quality, tool wear, and specific cutting energy for different cutting lengths. The wiper inserts provided a substantial improvement in the attainable surface quality compared with the results obtained using conventional inserts under optimal cutting conditions for the entire range of the machined lengths. In addition, the conventional inserts showed a dramatic increase in roughness with an increased length of the cut, while the wiper inserts showed only a minor increase for the same length of cut. A scanning electron microscope was used to examine the wear for both types of inserts. Conventional inserts showed higher trends for both the average and maximum flank wear with cutting length compared to the wiper inserts, except for lengths of 200–400 mm, where conventional inserts showed less average flank wear. A higher accumulation of deposited chips was observed on the flank face of the wiper inserts than the conventional inserts. The experimental results demonstrated that edge chipping was the chief tool wear mechanism on the rake face for both types of insert, with more edge chipping observed in the case of the conventional inserts than the wiper inserts, with negligible evidence of crater wear in either case. The wiper inserts were shown to have a higher specific cutting energy than those detected with conventional inserts. This was attributed to (i) the irregular nose feature of the wiper inserts differing from the simpler round nose geometry of the conventional inserts and (ii) a higher tendency of chip accumulation on the wiper inserts.