We report on the fabrication of top-gate phototransistors based on a few-layered MoS(2) nanosheet with a transparent gate electrode. Our devices with triple MoS(2) layers exhibited excellent photodetection capabilities for red light, while those with single- and double-layers turned out to be quite useful for green light detection. The varied functionalities are attributed to energy gap modulation by the number of MoS(2) layers. The photoelectric probing on working transistors with the nanosheets demonstrates that single-layer MoS(2) has a significant energy bandgap of 1.8 eV, while those of double- and triple-layer MoS(2) reduce to 1.65 and 1.35 eV, respectively.

Top‐gate ferroelectric memory transistors with single‐ to triple‐layered MoS2 nanosheets adopting poly(vinylidenefluoride‐trifluoroethylene) [P(VDF‐TrFE)] are demonstrated. The nonvolatile memory transistor with a single‐layer MoS2 channel exhibits excellent retention properties for more than 1000 s, maintaining ~5 × 103 for the program/erase ratio and displaying a high mobility of ~220 cm2/(V·s).

sputter-deposition and photolithography. As a result, we found a unique property of graphene electrode, which not only showed superior ohmic or ON current behavior to those of Au/Ti but also more enhanced OFF state behavior as well. We regard that such positive results are attributed to gate-voltage-induced work function tuning in exfoliated graphene.A scanning electron microscopy (SEM) image in Figure 1 a shows 30-µm-long MoS 2 fl ake that we placed on 285-nm-thick SiO 2 /p + -Si substrate, where two Au/Ti electrodes are deposited on MoS 2 while two graphene fl akes are placed on the same MoS 2 . The graphene electrodes are then connected to Au/Ti lead lines, as shown in the overall device scheme of Figure 1 b. Figure 1 c illustrates an initial device process step where the MoS 2 exfoliation by polydimethylsiloxane (PDMS) stamp and its transfer to SiO 2 /p + -Si substrate are performed, while another similar steps for graphene transfer are also shown in Figure 1 d where in fact we use an optical microscope (OM) to fi nd the initially-transferred MoS 2 channel fl ake and to align the graphene S/D fl akes on the MoS 2 channel fl ake (note the four arrows indicating such fl ake alignment by substrate stage movement). Since the contact needs some pressure (to red arrow direction) between graphene and device substrate, we call this contact method "direct imprint" and more details were recently introduced elsewhere. [ 38 ] After the two graphene S/D electrodes were properly arranged, Au/Ti (50 nm/25 nm) contact electrodes were patterned by photolithography and DC sputter-deposition/liff-off processes as respectively shown in Figure 1 e,f, to contact both MoS 2 and graphene electrodes once and for all. Figure 1 f is a schematic version of SEM image in Figure 1 a. Since we initially assumed that our long MoS 2 should have a uniform thickness in every location, it was necessary to experimentally measure the thickness of at least two important locations in Figure 2 a (an OM version of Figure 1 a): a central location (MoS 2 I) between graphene electrodes and another central location (MoS 2 II) between Au/Ti electrodes.According to atomic force microscopy scan results, the thicknesses of those two regions appear almost the same, to be ≈5 nm (7≈8 L) (see Figure 2 b,c). We also measured the thicknesses of two graphene S/D fl akes, which appear 15 and 12 nm for Gr1 and Gr2, respectively (see Figure 2 d,e). Figure 3 a displays the drain current-gate voltage ( I D -V G ) transfer characteristics obtained from both MoS 2 nanosheet FETs with graphene and Au/Ti S/D contacts, which have not Field-Effect TransistorsMechanically-exfoliated or chemical vapor deposited graphene has been extensively studied for any practical usages as the most well-known two dimensional (2D) nanosheet, since it was found and developed. [1][2][3][4][5][6] One of the practical applications was a source/drain (S/D) electrode [7][8][9][10][11][12][13][14][15] for such a variety of transistors as organic thin-fi lm transistors, [ 11 ] Si-based transistors, [ ...

Two-dimensional (2D) molybdenum disulfide (MoS₂) field-effect transistors (FETs) have been extensively studied, but most of the FETs with gate insulators have displayed negative threshold voltage values, which indicates the presence of interfacial traps both shallow and deep in energy level. Despite such interface trap issues, reports on trap densities in MoS₂ are quite limited. Here, we probed top-gate MoS₂ FETs with two- (2L), three- (3L), and four-layer (4L) MoS₂/dielectric interfaces to quantify deep-level interface trap densities by photo-excited charge collection spectroscopy (PECCS), and reported the result that deep-level trap densities over 10(12) cm(-2) may exist in the interface and bulk MoS₂ near the interface. Transfer curve hysteresis and PECCS measurements show that shallow traps and deep traps are not that different in density order from each other. We conclude that our PECCS analysis distinguishably provides valuable information on deep level interface/bulk trap densities in 2D-based FETs.

Lead sulfide (PbS) quantum dots (QDs) have great potential in optoelectronic applications because of their desirable characteristics as a light absorber for near-infrared (NIR) photodetection. However, most PbS-based NIR photodetectors are two-terminal devices, which require an integrated pixel circuit to be practical photosensors. Here we report on PbS QD/indium gallium zinc oxide (InGaZnO, IGZO) metal oxide semiconductor hybrid phototransistors with a photodetection capability between 700 and 1400 nm, a range that neither conventional Si nor InGaAs photodetectors can cover. The new hybrid phototransistor exhibits excellent photoresponsivity of over 10 6 A W − 1 and a specific detectivity in the order of 10 13 Jones for NIR (1000 nm) light. Furthermore, we demonstrate an NIR (1300 nm) imager using photogating inverter pixels based on PbS/IGZO phototransistors at an imaging frequency of 1 Hz with a high output voltage photogain of~4.9 V (~99%). To the best of our knowledge, this report demonstrates the first QD/metal oxide hybrid phototransistor-based flat panel NIR imager. Our hybrid approach using QD/metal oxide paves the way for the development of gate-tunable and highly sensitive flat panel NIR sensors/ imagers that can be easily integrated.