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Power semiconductor devices are often connected in parallel to increase the current rating of the power conversion systems. However, due to mismatched circuit parameters or semiconductor fabrication discrepancies, the current of paralleled power semiconductor devices can be unbalanced, which potentially leads to accelerated aging and long-term reliability issues. The fast-switching speed of silicon carbide (SiC) devices aggravates this problem due to its higher sensitivity to parasitic parameters. Numerous efforts have been dedicated to analyzing and addressing the current imbalance issue of paralleling SiC devices. This article comprehensively summarizes and presents state-of-the-art research regarding the current imbalance in paralleled SiC devices. Degree of imbalance is proposed to comprehensively quantify the current mismatch. Starting with mechanism analysis, different types of current imbalance are categorized. Various device parameters and the package layout that impact the current distribution are investigated. The existing solutions including passive methods and active methods are concluded and categorized. This work also incorporates insight into the future development needs of high-power multichip SiC module packaging and driving technologies.

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