High contact resistance is one of the primary concerns for electronic device applications of two-dimensional (2D) layered semiconductors. Here, we explore the enhanced carrier transport through metal-semiconductor interfaces in WS2 field effect transistors (FETs) by introducing a typical transition metal, Cu, with two different doping strategies: (i) a "generalized" Cu doping by using randomly distributed Cu atoms along the channel and (ii) a "localized" Cu doping by adapting an ultrathin Cu layer at the metal-semiconductor interface. Compared to the pristine WS2 FETs, both the generalized Cu atomic dopant and localized Cu contact decoration can provide a Schottky-to-Ohmic contact transition owing to the reduced contact resistances by 1 -3 orders of magnitude, and consequently elevate electron mobilities by 5 -7 times higher. Our work demonstrates that the introduction of transition metal can be an efficient and reliable technique to enhance the carrier transport and device performance in 2D TMD FETs. IntroductionTungsten disulfide (WS2) with a semiconducting 2H phase is one of two-dimensional (2D) transition metal dichalcogenides (TMDs) exhibiting a series of unique properties, such as strong spin-orbit coupling, band splitting, and high nonlinear susceptibility 1-3 . Especially for future nanoelectronic applications, WS2 stands out as a promising channel material compared to other 2D semiconductors. For example, WS2 has a direct bandgap of 1.4 -2.0 eV 4-7 for the monolayer and an indirect bandgap of 1.2 -1.3 eV 4-6 for the bulk crystals. The carrier mobility of WS2 has been theoretically predicated up to ~5,300 cm 2 /Vs at 77 K 8 and ~700 -1,100 cm 2 /Vs at room temperature 8,9 , which exceeds most of the commonly used semiconducting TMDs such as MoS2 (340 cm 2 /Vs), MoSe2 (240 cm 2 /Vs), WSe2 (705 cm 2 /Vs), owing to the relatively small effective mass (0.34m0 for electrons and 0.46m0 for holes, where m0 is the free electron mass) 7 . Although the experimentally demonstrated electron mobilities, limited by Coulomb impurities, charge traps, surface defects and roughness, are much lower than the theoretical predication, new techniques have been developed to practically improve the mobility, for example, by exploiting h-BN 10 or high-k 11 dielectrics. For the application of field-effect transistors (FETs), monolayer WS2 FETs are predicated to outperform other TMD FETs in terms of the on-state current density (JD,on) for both p-and n-type transistors (~2,800 μA/μm for the monolayer WS2 versus 2,200 -2,400 μA/μm for the monolayer MoS2, MoSe2, and MoTe2 FETs) 11 . In addition to the carrier mobility, the pristine hysteresis width of WS2 during reliability tests is the lowest compared to MoS2, MoSe2and MoTe2 FETs 12 . The current on/off ratio at room temperature has been experimentally demonstrated up to ~10 6 for the monolayer WS2 FETs 13,14 and to ~10 8 for the multilayer WS2 FETs 15 . A nearly ideal subthreshold swing (SS) of 70 mV/decade at room temperature has been demonstrated in a simple back-gated WS2 FET th...

Room-temperature Fermi-Dirac electron thermal excitation in conventional threedimensional (3D) or two-dimensional (2D) semiconductors generates hot electrons with a relatively long thermal tail in energy distribution. These hot electrons set a fundamental obstacle known as the "Boltzmann tyranny" that limits the subthreshold swing (SS) and therefore the minimum power consumption of 3D and 2D field-effect transistors (FETs). Here, we investigated a novel graphene (Gr)-enabled cold electron injection where the Gr acts as the Dirac source to provide the cold electrons with a localized electron density distribution and a short thermal tail at room temperature. These cold electrons correspond to an electronic cooling effect with the effective electron temperature of ~145 K in the monolayer MoS2, which enable the transport factor lowering and thus the steep-slope switching (across for 3 decades with a minimum SS of 29 mV/decade at room temperature) for a monolayer MoS2 FET. Especially, a record-high sub-60-mV/decade current density (over 1 μA/μm) can be achieved compared to conventional steep-slope technologies such as tunneling FETs or negative capacitance FETs using 2D or 3D channel materials. Our work demonstrates the great potential of 2D Dirac-source cold electron transistor as an innovative steep-slope transistor concept, and provides new opportunities for 2D materials toward future energy-efficient nanoelectronics.