Using NbN / TiN x / NbN / TiN x / NbN double-junction stack technology we have demonstrated a programmable Josephson voltage standard chip that operates up to 10.16 V output voltage cooled with a two-stage Gifford-McMahon cryocooler. The circuit uses double-junction stacks, where two junctions are fabricated in each stack, in order to integrate 327 680 junctions into a 15.3 mm ϫ 15.3 mm chip. A 1-to-32 microwave distribution circuit is also integrated on the chip. The chip is divided into 22 cells, which perform as an 11-bit digital-to-analog converter. The 21 working cells include 307 200 junctions biased with 16 GHz microwaves at 10.2 K that generated flat voltage steps with current margins greater than 1 mA, which indicates good uniformity of the stacked junctions.

A strong dependence of tunnel magnetoresistance (TMR) on the crystal orientation of ferromagnetic electrodes was confirmed experimentally. We studied the TMR of Fe/Al2O3/Fe50Co50 tunnel junctions with single-crystal Fe electrodes of different crystal orientations and found that the TMR ratio increased from 13% to 42% at 2K (8% to 26% at room temperature) when the crystal orientation was changed from (100) to (211). Such a TMR anisotropy could be explained in terms of the anisotropic spin polarization of Fe bulk and/or interface electronic states. The importance of the "momentum-filtering" effect of the tunnel barrier was also discussed.

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A refrigeration system was designed and constructed for realizing a liquid-He-free programmable Josephson voltage standard. The system is equipped with a two-stage Gifford-McMahon cooler, a thermal-radiation shield, a magnetic-field shield and semi-rigid coaxial cables to supply microwave power to a chip. The performance of the system was examined by use of a NbN-based 8-bit digital-to-analog converter (DAC) chip designed as a 1 V programmable voltage standard. When operated at 8.5 K on the cryocooler, constant-voltage steps with amplitudes greater than 1 mA were observed for every segment of junction arrays on the chip.

A 10 V programmable Josephson voltage standard (PJVS) circuit with a maximum output voltage of 20 V and a microwave bias of 18.5 GHz was designed and fabricated. Although an attempt was made to improve the fabrication yield for the 10 V PJVS circuit, it was not sufficiently large to reproducibly fabricate a perfect chip without any defects. The redundant arrays were additionally integrated to increase the maximum output voltage, which contributed to an increase in the number of available chips under the limited fabrication yield. Fortunately, most of the defective arrays had a zeroth Shapiro step, while the first step was very small or zero. If the array was not dc biased, it did not generate any voltage, because it worked as a superconductive wiring. In this case, the maximum output voltage became smaller than that of a perfect chip, but it functioned as a 10 V PJVS, due to the back-up arrays.